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    IQD Frequency Products LFPTXO000268BULK

    XTAL OSC TCXO 16.3840MHZ HCMOS
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey LFPTXO000268BULK 362 1
    • 1 $53.97
    • 10 $51.175
    • 100 $48.384
    • 1000 $48.384
    • 10000 $48.384
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    IQD Frequency Products LFPTXO000009BULK

    XTAL OSC TCXO 40.0000MHZ HCMOS
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey LFPTXO000009BULK 124 1
    • 1 $53.97
    • 10 $51.175
    • 100 $48.384
    • 1000 $48.384
    • 10000 $48.384
    		Buy Now

    IQD Frequency Products LFPTXO000295BULK

    XTAL OSC VCTCXO 10.0000MHZ HCMOS
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey LFPTXO000295BULK 64 1
    • 1 $53.97
    • 10 $51.175
    • 100 $48.384
    • 1000 $48.384
    • 10000 $48.384
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    IQD Frequency Products LFPTXO000244BULK

    XTAL OSC TCXO 20.0000MHZ HCMOS
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey LFPTXO000244BULK 53 1
    • 1 $53.97
    • 10 $51.175
    • 100 $48.384
    • 1000 $48.384
    • 10000 $48.384
    		Buy Now
    Richardson RFPD LFPTXO000244BULK 10
    • 1 -
    • 10 $51.49
    • 100 $32.63
    • 1000 $24.45
    • 10000 $24.45
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    IQD Frequency Products LFPTXO000001BULK

    XTAL OSC TCXO 10.0000MHZ HCMOS
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey LFPTXO000001BULK 42 1
    • 1 $53.97
    • 10 $51.175
    • 100 $48.384
    • 1000 $48.384
    • 10000 $48.384
    		Buy Now
    Richardson RFPD LFPTXO000001BULK 10
    • 1 -
    • 10 $51.49
    • 100 $44.08
    • 1000 $24.45
    • 10000 $24.45
    		Buy Now
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    PTXO Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    FOQ PIEZO TECHNIK GMBH

    Abstract: FOQ PIEZO foq piezo technik ptxo 4614 SMD FOQ PIEZO TECHNIK 55 MHz smd 4614 74906 smd 5c 6PIN cs0702
    Text: PTXO7 series - SMD XO, frequencies up to 800 MHz Highlights PTXO7 series: Low phase noise optimised design Complementary output available Enable / disable function available Different designs depending on customers requirements General electrical parameter PTXO7 series


    Original     		PDF D-74906 FOQ PIEZO TECHNIK GMBH FOQ PIEZO foq piezo technik ptxo 4614 SMD FOQ PIEZO TECHNIK 55 MHz smd 4614 74906 smd 5c 6PIN cs0702

    FOQ PIEZO TECHNIK GMBH

    Abstract: No abstract text available
    Text: PTXO7 series - SMD XO, frequencies up to 800 MHz Highlights PTXO7 series: Low phase noise optimised design Complementary output available Enable / disable function available Different designs depending on customers requirements General electrical parameter PTXO7 series


    Original     		PDF D-74906 FOQ PIEZO TECHNIK GMBH

    Untitled

    Abstract: No abstract text available
    Text: ispLSI 2064E In-System Programmable SuperFAST High Density PLD Features Functional Block Diagram • SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 2000 PLD Gates — 64 I/O Pins, Four Dedicated Inputs — 64 Registers — High Speed Global Interconnect


    Original     		PDF 2064E 00-Pin 766A-2064E 0212/2064E 2064E 2064E-200LT100 100-Pin 2064E-135LT100

    Untitled

    Abstract: No abstract text available
    Text: LeadFree a P ckage Options Available! ispLSI 2128/A In-System Programmable High Density PLD Features Functional Block Diagram • ENHANCEMENTS fmax = 100 MHz Maximum Operating Frequency tpd = 10 ns Propagation Delay • IN-SYSTEM PROGRAMMABLE D0 C7 A1 ES


    Original     		PDF 2128/A OuLTN176 176-Pin 128A-80LQN160 160-Pin 128A-80LTN176 128A-80LTN176I

    B272

    Abstract: No abstract text available
    Text: ispLSI 3192 High Density Programmable Logic Features Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 192 I/O Pins — 9000 PLD Gates — 384 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.


    Original     		PDF Faste14 3192-100LM 240-Pin 3192-100LB272 272-Ball 3192-70LM 3192-70LB272 3192-70LMI B272

    2096VE

    Abstract: TQFP 128pin
    Text: ispLSI 2192VL Functional Block Diagram — — — — — 8000 PLD Gates 96 I/O Pins, Nine Dedicated Inputs 192 Registers High Speed Global Interconnect Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic


    Original     		PDF 2192VL 2096VE 0139/2192VL 212A/2192VL 2192VL 2192VL-150LT128 128-Pin 2192VL-150LB144 144-Ball 2192VL-135LT128 2096VE TQFP 128pin

    Untitled

    Abstract: No abstract text available
    Text: ispLSI 2032V/LV 3.3V High Density Programmable Logic Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — — — — — fmax = 100 MHz Maximum Operating Frequency tpd = 7.5 ns Propagation Delay A1 A2 D Q GLB A6 D Q D Q A5 D Q A3 A4


    Original     		PDF 032V/LV 0139Bisp/2000 44-Pin 032V-80LT44 2032LV-80LT44* 032V-60LJ44 2032LV-60LJ*

    Untitled

    Abstract: No abstract text available
    Text: ispLSI 2096V 3.3V High Density Programmable Logic Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 4000 PLD Gates — 96 I/O Pins, Six Dedicated Inputs — 96 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original     		PDF 128-Pin 0212/2096V 096V-80LT128 096V-80LQ128 096V-60LT128 096V-60LQ128

    2096VE

    Abstract: No abstract text available
    Text: ispLSI 2192VL 2.5V In-System Programmable SuperFAST High Density PLD Functional Block Diagram — — — — — 8000 PLD Gates 96 I/O Pins, Nine Dedicated Inputs 192 Registers High Speed Global Interconnect Wide Input Gating for Fast Counters, State


    Original     		PDF 2192VL 2096VE 0139/2192VL 2192VL 128-Pin 144-Ball 212A/2192VL 2192VL-150LT128 2096VE

    mbm27c1000a

    Abstract: MBM27C512-20 str w 6554 df rr 3pin transistor MB89920 abcc MB89923 MB89925 MB89P928 MB89PV920
    Text: FUJITSU SEMICONDUCTOR CONTROLLER MANUAL CM25-10127-1E F2MC-8L FAMILY MICROCONTROLLERS MB89920 SERIES HARDWARE MANUAL 1. The products described in this manual and the specifications thereof may be changed without prior notice. To obtain up-to-date information and/or specifications, contact your Fujitsu sales


    Original     		PDF CM25-10127-1E MB89920 0000B 1111B mbm27c1000a MBM27C512-20 str w 6554 df rr 3pin transistor abcc MB89923 MB89925 MB89P928 MB89PV920

    lattice 1016-60LJ

    Abstract: 5962-9476201MXC 1016-80lj 1016-60 1016-60LH ISPLSI 1016-60LJ Lattice 1016-80LJ 0123A-isp1016 ISP1016
    Text: ispLSI 1016 Device Datasheet September 2010 All Devices Discontinued! Product Change Notifications PCNs have been issued to discontinue all devices in this data sheet. The original datasheet pages have not been modified and do not reflect those changes.


    Original     		PDF 1016-60LJ 1016-80LJ 1016-90LJ 1016-110LJ 1016-60LJI 1016-60LT44 1016-80LT44 1016-90LT44 1016-60LT44I 1016-60LH/883 lattice 1016-60LJ 5962-9476201MXC 1016-80lj 1016-60 1016-60LH ISPLSI 1016-60LJ Lattice 1016-80LJ 0123A-isp1016 ISP1016

    1016-60

    Abstract: 5962-9476201MXC isPLSI1016
    Text: ispLSI 1016/883 In-System Programmable High Density PLD Functional Block Diagram D D EV IS I C CE O PC NT H A N IN S #0 U B 5A ED EE -1 P N 0 ER • HIGH-DENSITY PROGRAMMABLE LOGIC — High-Speed Global Interconnect — 2000 PLD Gates — 32 I/O Pins, Four Dedicated Inputs


    Original     		PDF 0212-80B-isp1016 MILITARY/883 1016-60LH/883 5962-9476201MXC 44-Pin 2-0041-16-isp1016 1016-60 5962-9476201MXC isPLSI1016

    ML2730

    Abstract: No abstract text available
    Text: ML2730 ML2730 2.4GHZ VARIABLE DATA RATE FSK TRANSCEIVER WITH INTEGRATED PA Package: 40 QFN, 6mmx6mm RX Subsystem IF Subsystem DATASEL F To V RXIN, RXIP 2.4GHz Input         gn es i TXO 2.4GHz +21dBm Output RXON XCEN DATA CLK EN TX Subsystem


    Original     		PDF ML2730 21dBm 40-Pin ML2730DM-SR ML2730SK-03 ML2730DM-SQ ML2730DM-T ML2730RDK-03 DS140313 ML2730

    Untitled

    Abstract: No abstract text available
    Text: ispLSI 3256 High Density Programmable Logic Functional Block Diagram A1 OR Array A2 A3 B1 B2 B3 N C0 C1 C2 R D Q F1 Twin GLB F0 D Q E3 D Q E2 D Q E1 Global Routing Pool E0 C3 Output Routing Pool • 100% IEEE 1149.1 BOUNDARY SCAN COMPATIBLE F2 D Q Array


    Original     		PDF 160-MQFP/3256 0212Aisp/3256 3256-70LM 160-Pin 3256-50LM 041A-08isp/3256

    ispLSI 3256A

    Abstract: No abstract text available
    Text: ispLSI 3256A In-System Programmable High Density PLD Functional Block Diagram • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable


    Original     		PDF 0212/3256A 256A-90LM* 160-Pin 256A-90LQ 256A-70LM* 256A-70LQ 256A-50LM* ispLSI 3256A

    Untitled

    Abstract: No abstract text available
    Text: Lattica ispLSI and pLSI 1032 ;Semiconductor I Corporation High-Density Programmable Logic Functional Block Diagram Features HIGH-DENSITY PROGRAMMABLE LOGIC — High Speed Global Interconnect — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs — 192 Registers


    OCR Scan     		PDF Military/883 1032-60LJI 84-Pin 1032-60LTI 100-Pin MILITARY/883 1032-60LG/883

    Untitled

    Abstract: No abstract text available
    Text: Lattice pLSI 1016/883 programmable Large Scale Integration High-Density Programmable Logic Features Functional Block Diagram • PROGRAMMABLE HIGH-DENSITY LOGIC — — — — — MIL-STD-883 Version of the pLS11016 High-Speed Global Interconnects 32 I/O Pins, Four Dedicated Inputs


    OCR Scan     		PDF MIL-STD-883 pLS11016 44-Pin pLS11016/883 1016-60LH/883 44vPln

    Untitled

    Abstract: No abstract text available
    Text: Lattice ispLSI and pLSI 1048E ; Semiconductor I Corporation High-Density Programmable Logic Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC O u tpu t R outing Pool — 8,000 PLD Gates | | O u tpu t R outing Pool ü m u lü lü llS i!


    OCR Scan     		PDF 1048E 1048E 1048E-90LQ 128-Pin 1048E-70LQ 1048E-50LQ

    Untitled

    Abstract: No abstract text available
    Text: Lattice ispLSr 1016 H I Semiconductor •■■ Corporation In-System Programmable High Density PLD Functional Block Diagram Features • HIGH-DENSITY PROGRAMMABLE LOGIC — High-Speed Global Interconnect — 2000 PLD Gates — 32 I/O Pins, Four Dedicated Inputs


    OCR Scan     		PDF Military/883 44-Pin 1016-80LT44 1016-60LJ 1016-60LT44 1016-60LJI

    Untitled

    Abstract: No abstract text available
    Text: Lattice ispLSr 1024 H I Semiconductor •■■ Corporation In-System Programmable High Density PLD Functional Block Diagram Features • HIGH-DENSITY PROGRAMMABLE LOGIC — High-Speed Global Interconnect — 4000 PLD Gates — 48 I/O Pins, Six Dedicated Inputs


    OCR Scan     		PDF Military/883 1024-80LJ 68-Pin 1024-80LT 100-Pin 1024-60LJ 1024-60LT 1024-60LJI

    Untitled

    Abstract: No abstract text available
    Text: Lattice ispLSr 1032 H I Semiconductor •■■ Corporation In-System Programmable High Density PLD Functional Block Diagram Features • HIGH-DENSITY PROGRAMMABLE LOGIC — High Speed Global Interconnect — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs


    OCR Scan     		PDF Military/883 84-Pin 1032-60LJ 1Q32-6GLT 100-Pin 1032-60LJI 1032-60LTI

    isplsi device layout

    Abstract: No abstract text available
    Text: LATTICE SEMICONDUCTOR Lattice bö E » • SBÖb^MT 4Ô0 » L A T p L S r and ispLSI ' 1024 High-Density Programmable Logic Features Functional Block Diagram • PROGRAMMABLE AND IN-SYSTEM PROGRAMMABLE HIGH DENSITY LOGIC — High-Speed Global Interconnect


    OCR Scan     		PDF DD02bn Military/883 1024-90U 68-Pin pLS11024-80LJ pLS11024-60LJ 1024-90LJ isplsi device layout

    Untitled

    Abstract: No abstract text available
    Text: pLs/81016 I a ttirp m \ß W l li I w Droarammable Intearation programmable Larae Large Scale Integration High-Density Programmable Logic Functional Block Diagram Features • PROGRAMMABLE HIGH-DENSITY LOGIC — — — — — Member of Lattice’s pLSI Family


    OCR Scan     		PDF pLs/81016 pLS11016 1016-90LJ 1016-80LJ 1016-60LJ 1016-60LJI

    Untitled

    Abstract: No abstract text available
    Text: Lattice ispLSI’ and pLSI’ 2096V ; ” Semiconductor • ■ ■ Corporation 3.3V High-Density Programmable Logic Features Functional Block Diagram* • HIGH DENSITY PROGRAMMABLE LOGIC is»« r r m i n n r a n — — — — — 4000 PLD Gates 96 I/O Pins, Six Dedicated Inputs


    OCR Scan     		PDF 128-pin DDDSM70 0212/2096V