Clock Distribution
Abstract: PTN1111
Text: High-Speed Clock DS/00PS014 6/21/00 12:31 PM Page 1 Optimizing High-speed Clock System Performance PTN1111 PECL Clock Distribution Device FUNCTIONAL DESCRIPTION The PTN1111 is a low-skew, 1:10 PECL clock distribution device. One selected clock signal out of two selectable inputs is fanned
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DS/00PS014
PTN1111
PTN1111
401650/10K/FP/2pp/0600
Clock Distribution
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PTN3310
Abstract: PTN3311 TK71525SCL AN257 PTN1111 PTN2111 ldvs connector
Text: INTEGRATED CIRCUITS AN257 PTN products demo board documentation Kristina Avrionova Philips Semiconductors 2001 Oct 08 Philips Semiconductors Application Note PTN products demo board documentation some loop involvement. PTN1111’s input signal could be either from
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AN257
PTN1111
PTN3322,
PTN3311
PTN3322.
PTN1111
PTN3311
PTN2111
PTN3310
PTN3310
TK71525SCL
AN257
PTN2111
ldvs connector
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ASIC R2
Abstract: PTN1111 PTN2111 AN259
Text: INTEGRATED CIRCUITS AN259 Applications and performance of PTN1111 and PTN2111 clock distribution devices Kristina Avrionova Philips Semiconductors 2001 Oct 16 Philips Semiconductors Application note Applications and performance of PTN1111 and PTN2111 clock distribution devices
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AN259
PTN1111
PTN2111
PTN2111
PTN1111
ASIC R2
AN259
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ASIC R2
Abstract: PTN2111 AN259 PTN1111
Text: INTEGRATED CIRCUITS AN259 Applications and performance of PTN1111 and PTN2111 clock distribution devices Kristina Avrionova Philips Semiconductors 2001 Oct 16 Philips Semiconductors Application note Applications and performance of PTN1111 and PTN2111 clock distribution devices
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AN259
PTN1111
PTN2111
PTN2111
PTN1111
ASIC R2
AN259
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MC100EP111
Abstract: LQFP32 MC100LVEP111 PTN1111 PTN1111BD
Text: INTEGRATED CIRCUITS PTN1111 1:10 PECL clock distribution device Product data 2001 Jun 19 Philips Semiconductors Philips Semiconductors Product data 1:10 PECL clock distribution device PTN1111 Q1 Q2 Q2 27 26 25 VCCO Q1 28 Q0 29 30 32 VCCO Q0 PIN CONFIGURATION
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PTN1111
MC100EP111,
MC100LVEP111
LQFP32
MC100EP111
MC100LVEP111
PTN1111
PTN1111BD
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PTN3322
Abstract: 0.01U R13 SMA AN257 PTN1111 PTN2111 PTN3310 PTN3311 TK71525SCL SW DIP5
Text: INTEGRATED CIRCUITS AN257 PTN products demo board documentation Kristina Avrionova Philips Semiconductors 2001 Oct 08 Philips Semiconductors Application Note PTN products demo board documentation some loop involvement. PTN1111’s input signal could be either from
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AN257
PTN1111
PTN3322,
PTN3311
PTN3322.
PTN1111
PTN3311
PTN2111
PTN3310
PTN3322
0.01U
R13 SMA
AN257
PTN2111
PTN3310
TK71525SCL
SW DIP5
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LQFP32 package
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS PTN1111 1:10 PECL clock distribution device Objective specification Supersedes data of yyyy mmm dd ICxx Data Handbook Philips Semiconductors 1999 Aug 25 Philips Semiconductors Objective specification 1:10 PECL clock distribution device
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PTN1111
PTN1111
MC100EP11
LQFP32
LQFP32 package
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Untitled
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS PTN1111 1:10 PECL clock distribution device Product data File under: System>Communications>Datacommunication>Clock Buffers Functions>ICs>Datacommunication>Clock Buffers Functions>ICs>Logic>Clock Buffers Philips Semiconductors 2001 May 29
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PTN1111
PTN1111
MC100EP111,
MC100LVEP111
LQFP32
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CDCLVP110
Abstract: CDCLVP110MVFR LVEP111 MC100 PTN1111 SCAA056
Text: CDCLVP110 www.ti.com SCAS683D – JUNE 2002 – REVISED JANUARY 2011 Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock
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CDCLVP110
SCAS683D
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
CDCLVP110MVFR
LVEP111
PTN1111
SCAA056
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CDCLVP110
Abstract: LVEP111 MC100 PTN1111 SCAA056 S-PQFP-G32 scas683
Text: CDCLVP110 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER SCAS683 A– JUNE 2002 – REVISED AUGUST 2002 D Distributes One Differential Clock Input D D D D D D D Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 Pair LVPECL/HSTL to Ten Differential LVPECL Clock Outputs
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CDCLVP110
SCAS683
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
LVEP111
PTN1111
SCAA056
S-PQFP-G32
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cdclvp111vf
Abstract: CDCLVP111 CDCLVP111RHBR LVEP111 MC100 PTN1111 QFN32 SCAA056
Text: CDCLVP111 www.ti.com SCAS859C – JANUARY 2009 – REVISED NOVEMBER 2009 LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER Check for Samples :CDCLVP111 FEATURES APPLICATIONS • • • 1 2 • • • • • • • • Distributes One Differential Clock Input Pair
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CDCLVP111
SCAS859C
32-Pin
cdclvp111vf
CDCLVP111
CDCLVP111RHBR
LVEP111
MC100
PTN1111
QFN32
SCAA056
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CDCLVP110
Abstract: CDCLVP110VF LVEP111 MC100 PTN1111 SCAA056
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
CDCLVP110VF
LVEP111
PTN1111
SCAA056
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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INSSTE32882
Abstract: maxim dallas 2501 P16CV SY100EL16 SN65MLVD201 SN65EPT22 INCU877 INCUA877 ttl crystal oscillator using 7404 P16CV857B
Text: Clocks and Timing Guide www.ti.com/clocks 2Q 2009 2 Clocks and Timing Guide ➔ Clocks and Timing Selection Tree Clocks by Function Clock Distribution Non- PLL Fanout Buffers PLL Buffers RF Synthesizers Clock Generation General Purpose Generator/Synthesizer
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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Untitled
Abstract: No abstract text available
Text: CDCLVP111 www.ti.com . SCAS859 – JANUARY 2009 LOW-VOLTAGE 1:10 LVPECL
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CDCLVP111
SCAS859
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CYPRESS SEMICONDUCTOR
Abstract: nxp Cross-reference AMI Semiconductor DSP ICS9112-17 PIC182 C9850 CDCLVD110 IDT CROSS MC100LVE111 MC100LVEP111
Text: PIN-PIN Compatible Cross-Reference Guide Competitor Name AMI Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress Semiconductor Cypress
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FS612509
CDCVF2509
CY2212
CDCR61A
W152-1/-11
CYPRESS SEMICONDUCTOR
nxp Cross-reference
AMI Semiconductor DSP
ICS9112-17
PIC182
C9850
CDCLVD110
IDT CROSS
MC100LVE111
MC100LVEP111
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Untitled
Abstract: No abstract text available
Text: CDCLVP215 www.ti.com SCAS853B – APRIL 2008 – REVISED NOVEMBER 2009 LOW-VOLTAGE DUAL DIFFERENTIAL 1:5 LVPECL CLOCK DRIVER Check for Samples: CDCLVP215 FEATURES 1 • • • • APPLICATIONS • • QA3 QA4 QA4 QB0 QB0 QB1 QB1 QA3 24 23 22 21 20 19 18 17
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CDCLVP215
SCAS853B
QFN32
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Untitled
Abstract: No abstract text available
Text: CDCLVP111 SCAS859E – JANUARY 2009 – REVISED JULY 2011 www.ti.com Low-Voltage 1:10 LVPECL with Selectable Input Clock Driver Check for Samples: CDCLVP111 FEATURES APPLICATIONS • • • 1 2 • • • • • • • • Distributes One Differential Clock Input Pair
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CDCLVP111
SCAS859E
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CDCLVP110
Abstract: CDCLVP110MVFR LVEP111 MC100 PTN1111 SCAA056
Text: CDCLVP110 www.ti.com SCAS683B – JUNE 2002 – REVISED JANUARY 2010 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock
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CDCLVP110
SCAS683B
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
CDCLVP110MVFR
LVEP111
PTN1111
SCAA056
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INSSTE32882
Abstract: maxim dallas 2501 insstua32866 INSSTU32864 INSSTU32866 ttl crystal oscillator using CIRCUIT DIAGRAM INCUA877 ps 2501 dallas GSM home automation block diagram INCU877
Text: Clocks and Timing Guide www.ti.com/clocks 2Q 2009 2 Clocks and Timing Guide ➔ Clocks and Timing Selection Tree Clocks by Function Clock Distribution Non- PLL Fanout Buffers PLL Buffers RF Synthesizers Clock Generation General Purpose Generator/Synthesizer
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CDCLVP110
Abstract: CDCLVP110VF LVEP111 MC100 PTN1111 SCAA056
Text: CDCLVP110 www.ti.com SCAS683A – JUNE 2002 – REVISED AUGUST 2002 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER FEATURES • • • • • • • • • DESCRIPTION Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL
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CDCLVP110
SCAS683A
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
CDCLVP110VF
LVEP111
PTN1111
SCAA056
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Untitled
Abstract: No abstract text available
Text: CDCLVP110 www.ti.com SCAS683D – JUNE 2002 – REVISED JANUARY 2011 Low-Voltage 1:10 LVPECL/HSTL With Selectable Input Clock Driver Check for Samples: CDCLVP110 FEATURES 1 • • • • • • • • • Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock
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CDCLVP110
SCAS683D
32-Pin
MC100
EP111,
ES6111,
LVEP111,
PTN1111
CDCLVP110
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PN9000
Abstract: HP8656B HP6624A system DC power supply pn9000 Absolute Phase Noise Measurements 11801C SCAA059 MC100EP SCAU007 Aeroflex PN9000 HP6624A
Text: Application Report SCAA068 – August 2003 Advantage of Using TI’s Lowest Jitter Differential Clock Buffer Heather McClendon/Kal Mustafa High Performance Analog/CDC ABSTRACT This application report presents various jitter and phase noise measurements of three
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SCAA068
PN9000
HP8656B
HP6624A system DC power supply
pn9000 Absolute Phase Noise Measurements
11801C
SCAA059
MC100EP
SCAU007
Aeroflex PN9000
HP6624A
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