Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    PR36A Search Results

    SF Impression Pixel

    PR36A Price and Stock

    E-T-A 104-PR3-6A

    CIR BRKR THRM 6A 250VAC 48VDC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 104-PR3-6A Bulk 50
    • 1 -
    • 10 -
    • 100 $16.0236
    • 1000 $16.0236
    • 10000 $16.0236
    		Buy Now
    Mouser Electronics 104-PR3-6A
    • 1 $21.92
    • 10 $20.26
    • 100 $14.91
    • 1000 $14.7
    • 10000 $14.7
    		Get Quote
    RS 104-PR3-6A Bulk 50
    • 1 -
    • 10 -
    • 100 $14.15
    • 1000 $14.15
    • 10000 $14.15
    		Get Quote
    Sager 104-PR3-6A 1
    • 1 $21.86
    • 10 $21.86
    • 100 $19.52
    • 1000 $10.99
    • 10000 $10.67
    		Buy Now

    E-T-A 104-D91-PR3-6A

    Circuit Breakers Miniaturised single pole thermal circuit breaker with push-to-reset tease free, trip-free, snap action mechanism (R-type TO CBE to EN 60934) for PCB mounting. Approved to CBE standard EN 60934 (IEC 60934). For higher current ratings see type 1140.
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics 104-D91-PR3-6A
    • 1 $22.97
    • 10 $21.57
    • 100 $15.22
    • 1000 $15.1
    • 10000 $15.1
    		Get Quote
    Sager 104-D91-PR3-6A
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 -
    		Buy Now

    PR36A Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    transistor pt36c

    Abstract: gp714 diode GP113 transistor pt42c diode gp116 GP114 GP021 PT36c gp627 GP111
    Text: OR4E FPGA Ver 2.0 1 4/1/2002 Lattice Semiconductor Corp Series 4 FPGA Evaluation Board Diagram Revision 2.0 OR4E FPGA Ver 2.0 2 4/1/2002 Lattice Semiconductor Corp JTAG Programming Connection J55 Schematic page 4 An 8-pin connection to the JTAG interface used for programming.


    Original     		PDF ADDR17 ADDR16 DATA31 DATA30 DATA29 DATA28 DATA27 DATA26 DATA25 DATA24 transistor pt36c gp714 diode GP113 transistor pt42c diode gp116 GP114 GP021 PT36c gp627 GP111

    TPE11

    Abstract: TPT20 CON6A v2 tpr4 pr48b PT13B condor E5 Condor LVCMOS15 LVCMOS25
    Text: LatticeEC Standard Evaluation Board – Revision B User’s Guide April 2007 ebug10_01.4 Lattice Semiconductor LatticeEC Standard Evaluation Board – Revision B User’s Guide Introduction The LatticeEC Standard Evaluation Board provides a convenient platform to evaluate, test and debug user


    Original     		PDF ebug10 120-pin) 32-bit PVG5H503A01 TPE11 TPT20 CON6A v2 tpr4 pr48b PT13B condor E5 Condor LVCMOS15 LVCMOS25

    OSC4/SM

    Abstract: MDLS-20265 OPTREX C-51505 MDLS-24265 short stop 12v p18 30a rs232 converter dmx Mosfet J49 LCM-S01602 lcm-s02402 Vishay SOT23 MARKING F5
    Text: LatticeXP2 Advanced Evaluation Board User’s Guide January 2009 Revision: EB30_01.3 LatticeXP2 Advanced Evaluation Board User’s Guide Lattice Semiconductor Introduction The LatticeXP2 Advanced Evaluation Board provides a convenient platform to evaluate, test and debug user


    Original     		PDF LatticeXP2-17 24-6R8 OSC4/SM MDLS-20265 OPTREX C-51505 MDLS-24265 short stop 12v p18 30a rs232 converter dmx Mosfet J49 LCM-S01602 lcm-s02402 Vishay SOT23 MARKING F5

    CON6A

    Abstract: K4T51163QG-HCE60 pDS4102-DL2 LVCMOS33 LVCMOS15 LVCMOS25 PB50B TPE11 PL43A FPGA48
    Text: LatticeEC Standard Evaluation Board – Revision A User’s Guide April 2007 EB07_02.4 Lattice Semiconductor LatticeEC Standard Evaluation Board – Revision A User’s Guide Introduction The LatticeEC Standard Evaluation Board provides a convenient platform to evaluate, test and debug user


    Original     		PDF 120-pin) 32-bit PVG5H503A01 CON6A K4T51163QG-HCE60 pDS4102-DL2 LVCMOS33 LVCMOS15 LVCMOS25 PB50B TPE11 PL43A FPGA48

    LC4064ZE

    Abstract: BSDL Files infineon LFXP6C-3FN256I "x-ray machine" K4H560838E LC4064 LC4256ZE LFXP10C-3F256I LFxP3C-3TN144C PCI x1 express PCB dimensions artwork
    Text: LatticeXP Family Handbook HB1001 Version 03.4, September 2010 LatticeXP Family Handbook Table of Contents September 2010 Section I. LatticeXP Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1001 TN1050 TN1049 TN1082 TN1074 LC4064ZE BSDL Files infineon LFXP6C-3FN256I "x-ray machine" K4H560838E LC4064 LC4256ZE LFXP10C-3F256I LFxP3C-3TN144C PCI x1 express PCB dimensions artwork

    syscon

    Abstract: LFEC1E-3T100C ips works 6CW3
    Text: LatticeECP/EC Family Data Sheet Version 01.3 LatticeECP/EC Family Data Sheet Introduction November 2004 Preliminary Data Sheet Features − − − − − − • Extensive Density and Package Options • 1.5K to 41K LUT4s • 65 to 576 I/Os • Density migration supported


    Original     		PDF 36x36 18x18 DDR400 200MHz) TN1052) TN1057) TN1053) syscon LFEC1E-3T100C ips works 6CW3

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet Version 04.4, April 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


    Original     		PDF HSTL15 TN1050) TN1052) TN1082)

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet Version 03.0, September 2005 LatticeXP Family Data Sheet Introduction July 2005 Advance Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


    Original     		PDF HSTL15 TN1050) TN1052) TN1082)

    pt45

    Abstract: No abstract text available
    Text: LatticeSC Family Data Sheet DS1004 Version 01.2, June 2006 LatticeSC Family Data Sheet Introduction June 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 110mW VCC12. LFSC25 900-Ball pt45

    Untitled

    Abstract: No abstract text available
    Text: LatticeECP/EC Family Handbook HB1000 Version 03.7, September 2012 LatticeECP/EC Family Handbook Table of Contents September 2012 Section I. LatticeECP/EC Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1000 TN1008 TN1010 TN1018 TN1071 TN1074 TN1078

    transistor pt36c

    Abstract: datasheet transistor pt36C PT35c transistor pt36c microprocessor block diagram of plc pt35c transistor pt42c PT42C transistor BC 157 PLC Communication cables pin diagram
    Text: Data Sheet November, 2003 ORCA Series 4 FPGAs Introduction • Traditional I/O selections: — LVTTL 3.3V and LVCMOS (2.5 V and 1.8 V) I/Os. — Per pin-selectable I/O clamping diodes provide 3.3 V PCI compliance. — Individually programmable drive capability:


    Original     		PDF sink/12 transistor pt36c datasheet transistor pt36C PT35c transistor pt36c microprocessor block diagram of plc pt35c transistor pt42c PT42C transistor BC 157 PLC Communication cables pin diagram

    Untitled

    Abstract: No abstract text available
    Text: LatticeSC/M Family Data Sheet DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW

    Untitled

    Abstract: No abstract text available
    Text: LatticeSC Family Data Sheet Version 01.1, April 2006 LatticeSC Family Data Sheet Introduction April 2006 Preliminary Data Sheet Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks


    Original     		PDF 700MHz 622Mbps 125Gbps) 100mW TN1101)

    prbs pattern generator using vhdl

    Abstract: BUT16
    Text: LatticeECP2/M Family Handbook HB1003 Version 04.9, April 2011 LatticeECP2/M Family Handbook Table of Contents April 2011 Section I. LatticeECP2/M Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1003 TN1113 TN1149 TN1102 TN1103 TN1105 TN1107 TN1108 TN1109 TN1124 prbs pattern generator using vhdl BUT16

    lfe2

    Abstract: PL25B
    Text: LatticeECP2/M Family Data Sheet DS1006 Version 02.6, April 2007 LatticeECP2/M Family Data Sheet Introduction April 2007 Advance Data Sheet DS1006 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic


    Original     		PDF DS1006 DS1006 200MHz) 266MHz) 256fpBGA 484-fpBGA ECP2M35E. 266MHz. 1152-fpBGA ECP2M70 lfe2 PL25B

    cmos circuit simulink example

    Abstract: B11G8 TN1126
    Text: LatticeXP2 Family Data Sheet DS1009 Version 01.1, May 2007 LatticeXP2 Family Data Sheet Introduction May 2007 Advance Data Sheet DS1009 Features – – – – • flexiFLASH™ Architecture • • • • • • Instant-on Infinitely reconfigurable


    Original     		PDF DS1009 DS1009 HSTL15 HSTL18 cmos circuit simulink example B11G8 TN1126

    Catalog Toshiba

    Abstract: st smd diode marking code G11 laser diode head toshiba semiconductor general catalog
    Text: LatticeECP/EC Family Handbook HB1000 Version 03.3, March 2010 LatticeECP/EC Family Handbook Table of Contents March 2010 Section I. LatticeECP/EC Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1000 TN1052 TN1074 Catalog Toshiba st smd diode marking code G11 laser diode head toshiba semiconductor general catalog

    LFXP15E

    Abstract: handbook motorola IPC J-STD-012
    Text: LatticeXP Family Handbook Version 01.6, September 2005 LatticeXP Family Handbook Table of Contents September 2005 Section I. LatticeXP Family Data Sheet Introduction Features . 1-1


    Original     		PDF 1-800-LATTICE LFXP15E handbook motorola IPC J-STD-012

    Untitled

    Abstract: No abstract text available
    Text: LatticeSC Family Data Sheet DS1004 Version 01.4b, February 2007 LatticeSC Family Data Sheet Introduction November 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW SC115

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Handbook HB1001 Version 02.9, April 2007 LatticeXP Family Handbook Table of Contents April 2007 Section I. LatticeXP Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1001 TN1050

    Untitled

    Abstract: No abstract text available
    Text: LatticeECP2/M Family Handbook HB1003 Version 02.2, February 2007 LatticeECP2/M Family Handbook Table of Contents February 2007 Section I. LatticeECP2/M Family Data Sheet Introduction Features . 1-1


    Original     		PDF HB1003 TN1106 TN1103 TN1149.

    lfe2m35e7fn484c

    Abstract: No abstract text available
    Text: LatticeECP2/M Family Data Sheet DS1006 Version 02.7, July 2007 LatticeECP2/M Family Data Sheet Introduction July 2007 Advance Data Sheet DS1006 • Pre-Engineered Source Synchronous I/O Features • DDR registers in I/O cells • Dedicated gearing logic • Source synchronous standards support


    Original     		PDF DS1006 DS1006 200MHz) 266MHz) 1152-fpBGA ECP2M70 ECP2M100. LatticeECP2M20 lfe2m35e7fn484c

    Untitled

    Abstract: No abstract text available
    Text: LatticeSC/M Family Data Sheet DS1004 Version 01.6, August 2007 LatticeSC/M Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os


    Original     		PDF DS1004 DS1004 700MHz 600Mbps 125Gbps) 105mW

    PR66A

    Abstract: PR63A PR28B PR43A pr64a PR67A pb37a PL34A PT100B pr19a
    Text: LatticeECP2/M Pin Assignment Recommendations August 2009 Technical Note TN1159 Introduction The LatticeECP2 and LatticeECP2M™ device families are designed for high-speed FPGA system applications. As with any high-speed system design, care must be given to certain critical pins that are designed to supply the


    Original     		PDF TN1159 pb82a pt48a pt52a pt30a pt48b pr12b pt99b pr14b pr14a PR66A PR63A PR28B PR43A pr64a PR67A pb37a PL34A PT100B pr19a