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    PIN 74LS42 Search Results

    PIN 74LS42 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CS-DSDMDB09MF-010 Amphenol Cables on Demand Amphenol CS-DSDMDB09MF-010 9-Pin (DB9) Deluxe D-Sub Cable - Copper Shielded - Male / Female 10ft Datasheet
    CS-DSDMDB15MF-002.5 Amphenol Cables on Demand Amphenol CS-DSDMDB15MF-002.5 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Female 2.5ft Datasheet
    CS-DSDMDB15MM-025 Amphenol Cables on Demand Amphenol CS-DSDMDB15MM-025 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Male 25ft Datasheet
    CS-DSDMDB25MM-010 Amphenol Cables on Demand Amphenol CS-DSDMDB25MM-010 25-Pin (DB25) Deluxe D-Sub Cable - Copper Shielded - Male / Male 10ft Datasheet
    CS-DSDMDB37MM-002.5 Amphenol Cables on Demand Amphenol CS-DSDMDB37MM-002.5 37-Pin (DB37) Deluxe D-Sub Cable - Copper Shielded - Male / Male 2.5ft Datasheet

    PIN 74LS42 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    transistor C3866

    Abstract: Zener PH SEC E13009 ups circuit schematic diagram 1000w E13007 2 E13007 C3866 power transistor texas ttl 74L505 Transistor C3246
    Text: BID CΚΤ DOLLY L IST L OGO LIST SA F E TY & RELIA ΒL TY ΤΕΚ PIN SYSTE M DIGITA L IC's MEMORIES, MOS CMOS .EC L , TT L MICR OP R OC E SSOR SPE CIA L FUN CTION IC's DIGITAL l LINE AR K ARR AYS LIN E A R IC's (PUR CH ) ΤΕΚ-MADE IC's IC's INDEX (COL ORE D PGS)


    Original     		PDF

    74LS42

    Abstract: PIN 74LS42 74LS42 datasheet LS42
    Text: SN54/74LS42 ONE-OF-TEN DECODER The LSTTL / MSI SN54 / 74LS42 is a Multipurpose Decoder designed to accept four BCD inputs and provide ten mutually exclusive outputs. The LS42 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families.


    Original     		PDF SN54/74LS42 74LS42 PIN 74LS42 74LS42 datasheet LS42

    74LS42

    Abstract: PIN 74LS42 data sheet 74ls42 LS42 sn5474ls42
    Text: SN54/74LS42 ONE-OF-TEN DECODER The LSTTL / MSI SN54 / 74LS42 is a Multipurpose Decoder designed to accept four BCD inputs and provide ten mutually exclusive outputs. The LS42 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families.


    Original     		PDF SN54/74LS42 74LS42 PIN 74LS42 data sheet 74ls42 LS42 sn5474ls42

    74LS138

    Abstract: 7443 ttl 74155 ttl 74191 7443 TTL 74ls138 74LS139 74LS191 74ls138 fairchild TTL 74145
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74LS138 7443 ttl 74155 ttl 74191 7443 TTL 74ls138 74LS139 74LS191 74ls138 fairchild TTL 74145

    74LS190 PIN diagram

    Abstract: presettable digital clock ttl 74191 Fairchild 74190 74LS191 74155 D130 74192 74ls192 pin diagram of 74163
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74LS190 PIN diagram presettable digital clock ttl 74191 Fairchild 74190 74LS191 74155 D130 74192 74ls192 pin diagram of 74163

    74191 8 bit

    Abstract: D flip-flop 74175 pin 74LS152 74155 D134 D132 74155 PIN DIAGRAM 7442 logic diagram D133 93L21
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74191 8 bit D flip-flop 74175 pin 74LS152 74155 D134 D132 74155 PIN DIAGRAM 7442 logic diagram D133 93L21

    pin diagram of 74LS191

    Abstract: TTL 7452 74155 74190 74151 74151 PIN DIAGRAM D132 74LS151 Logic DIAGRAM 74ls156 74191 state diagram
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 T12 T11 T10 T9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 pin diagram of 74LS191 TTL 7452 74155 74190 74151 74151 PIN DIAGRAM D132 74LS151 Logic DIAGRAM 74ls156 74191 state diagram

    74191 8 bit

    Abstract: 7443 Flip-Flop D134 7443 d Flip-Flop 74LS42 74155 9B23 D135 93L38 93L11
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74191 8 bit 7443 Flip-Flop D134 7443 d Flip-Flop 74LS42 74155 9B23 D135 93L38 93L11

    74LS190 PIN diagram

    Abstract: ttl 7442 74LS42 74LS138 pin diagram D134 7442 pin diagram 74155 74145 D133 93L01
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74LS190 PIN diagram ttl 7442 74LS42 74LS138 pin diagram D134 7442 pin diagram 74155 74145 D133 93L01

    D133

    Abstract: 74ls139 TTL 9334 74LS152 PIN 74LS42 7442 pin diagram 93L01 74156 ttl 74155 D132
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 T12 T11 T10 T9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 D133 74ls139 TTL 9334 74LS152 PIN 74LS42 7442 pin diagram 93L01 74156 ttl 74155 D132

    pin diagram decoder 74154

    Abstract: 74155 decoder 74LS247 TTL 7448 74LS42 cmos decoder 7448 input 16 pin 7SEG COM ANODE 74151 PIN DIAGRAM cI 74150 D133
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 pin diagram decoder 74154 74155 decoder 74LS247 TTL 7448 74LS42 cmos decoder 7448 input 16 pin 7SEG COM ANODE 74151 PIN DIAGRAM cI 74150 D133

    transistor d133

    Abstract: Decoder BCD 7 seg ttl 7442 transistor 6B 7-seg ANODE COMMON 74155 74LS247 pin diagram of 74LS247 ttl 74191 75491
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 transistor d133 Decoder BCD 7 seg ttl 7442 transistor 6B 7-seg ANODE COMMON 74155 74LS247 pin diagram of 74LS247 ttl 74191 75491

    7448 decoder

    Abstract: ID 9302 Fairchild 74190 pin diagram decoder 7447 TTL 7448 74LS47 74LS47 pin TTL 7446 decoder 74LS47 decoder 7448
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 G N D = Pin 8 Vcc = Pin 16 G N D = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 7448 decoder ID 9302 Fairchild 74190 pin diagram decoder 7447 TTL 7448 74LS47 74LS47 pin TTL 7446 decoder 74LS47 decoder 7448

    M74LS42P

    Abstract: 74LS42P mitsubishi DECODER 20-PIN
    Text: DESCRIPTION PIN CONFIGURATION TOP VIEW The M 74LS42P is a semiconductor integrated circuit provided with a BCD-to-decim al decoder function. FEATURES ÿô — • A ll outputs set high with reactive input • Usable as a 3-bit binary /octal decoder - [7


    OCR Scan     		PDF M74LS42P b2LHfl27 0013Sbl 14-PIN 16-PIN 20-PIN 74LS42P mitsubishi DECODER

    Untitled

    Abstract: No abstract text available
    Text: GD54/74LS42 BCD/DECIMAL DECODERS Features Pin C o n fig u ra tio n • • Diode clamped inputs Also for application as 4-line-to-16-line decoders; 3-line-to-8-line decoders • All outputs are high for invalid input conditions • Usable as a 3-bit binary/octal decoders


    OCR Scan     		PDF GD54/74LS42 4-line-to-16-line 74LS42

    74LS42

    Abstract: pin configuration 74LS04 54LS 74LS 74LS04 pin configuration 74LS42 PIN 74LS42
    Text: GD54/74LS42 BCD/DECIMAL DECODERS Features • • Pin Configuration Diode clam ped inputs Also for application as 4-lin e-to-1 6-line decoders; 3-lin e -to -8 -lin e d eco ders • • All outputs are high for invalid input conditions Usable as a 3 -b it binary/octal d eco ders


    OCR Scan     		PDF GD54/74LS42 4-line-to-16-line 74LS04 74LS42 pin configuration 74LS04 54LS 74LS 74LS04 pin configuration 74LS42 PIN 74LS42

    SN74ALS123

    Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
    Text: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS


    OCR Scan     		PDF MIL-M-38510 SN74ALS123 SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138

    74LS42P

    Abstract: M74LS42P
    Text: DESCRIPTION The M 7 4LS 42P is a s e m ic o n d u c to r integrated PIN CONFIGURATION TOP VIEW c irc u it p rovided w ith a B C D -to-decim al decoder fu n c tio n . FEATURES ÿô • A ll o u tp u ts set high w ith reactive in p u t Ÿl • Usable as a 3 -b it b in a ry /o c ta l decoder


    OCR Scan     		PDF M74LS42P 74LS42P b2LHfl27 0013Sbl

    74HC42P

    Abstract: No abstract text available
    Text: M IT S U B IS H I HIGH SPEED CMOS M 74H C 42P/FP/D P 1-O F -lO DECODER DESCRIPTION PIN CONFIGURATION TOP VIEW T h e M 7 4 H C 4 2 is a s e m ic o n d u c to r in te g ra te d c irc u it c o n ­ s is tin g of a B C D to d e c im a l d e c o d e r. " W FEATURES


    OCR Scan     		PDF 42P/FP/D G--06 74HC42P

    74LS429

    Abstract: No abstract text available
    Text: 74LS429 FIFO RAM Controller FRC Preliminary Specification Logic Products FEATURES • Direct addressing up to 64K • Cascadable for addressing beyond 64K • Asynchronous Read/Write operation • 3-State address outputs • Selectable FIFO length in multiples of 2


    OCR Scan     		PDF 74LS429 20MHz 185mA 28-Pin N74LS429N 1N916, 1N3084, 1N014 74LS429

    74LS429

    Abstract: PLD2 N74LS429N
    Text: Signetics 74LS429 FIFO RAM Controller FRC Preliminary Specification Logic Products FEATURES • Direct addressing up to 64K • Cascadable for addressing beyond 64K • Asynchronous Read/Write operation • 3-State address outputs • Selectable FIFO length in


    OCR Scan     		PDF 74LS429 1N916. 1N3064, 1N914 74LS429 PLD2 N74LS429N

    PLD12

    Abstract: 74LS429 N74LS429N PLD11 1N814 "FRC"
    Text: 74LS429 FIFO RAM Controller FRC Preliminary Specification Logic Products FEATURES • Direct addressing up to 64K • Cascadable for addressing beyond 64K • Asynchronous Read/Write operation • 3-State address outputs • Selectable FIFO length in multiples of 2


    OCR Scan     		PDF 74LS429 1N916. 1N3064. 1N814 PLD12 74LS429 N74LS429N PLD11 "FRC"

    74LS42

    Abstract: 7518 la 7518 LS42 motorola ttl PIN 74LS42
    Text: M M O T O R O L A SN54/74LS42 ONE-OF-TEN DECODER The LSTTL/MSISN54/74LS42 is a Multipurpose Decoder designed to ac­ cept four BCD inputs and provide ten mutually exclusive outputs. The LS42 is fabricated with the Schottky barrier diode process for high speed and is


    OCR Scan     		PDF LSTTL/MSISN54/74LS42 74LS42 7518 la 7518 LS42 motorola ttl PIN 74LS42

    IC 74LS42 N

    Abstract: 74LS42 function of 74LS42 IC
    Text: g MOTOROLA ' SN54LS42 SN74LS42 D E S C R IP T IO N — The LSTTL/M SI SN 54LS/74LS42 is a Multipurpose Decoder designed to accept four BCD inputs and provide ten mutually exclusive outputs. The LS42 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola


    OCR Scan     		PDF 54LS/74LS42 SN54LS42 SN74LS42 IC 74LS42 N 74LS42 function of 74LS42 IC