PD48
Abstract: uPD481850GF-A12-JBT
Text: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT µPD481850 8M-bit Synchronous GRAM Description The µPD481850 is a synchronous graphics memory SGRAM organized as 128 K words x 32 bits × 2 banks random access port. This device can operate up to 100 MHz by using synchronous interface. Also, it has 8-column Block Write
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PD481850
PD481850
100-pin
PD48
uPD481850GF-A12-JBT
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PD48
Abstract: PD481850 lm 512
Text: DATA SHEET DATA SHEET MOS INTEGRATED CIRCUIT µPD481850 8M-bit Synchronous GRAM Description The µPD481850 is a synchronous graphics memory SGRAM organized as 131,072 words x 32 bits × 2 banks random access port. This device can operate up to 100 MHz by using synchronous interface. Also, it has 8-column Block Write function
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PD481850
PD481850
100-pin
S100GF-65-JBT
PD481850.
PD481850GF-JBT:
PD48
lm 512
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uPC2581
Abstract: uPC2002 2sd1557 uPA67C uPB582 upc1237 uPC317 2P4M PIN DIAGRAM 2SC4328 uPC157
Text: C&C for Human Potential Microcomputer 1 SEMICONDUCTOR SELECTION GUIDE GUIDE BOOK IC Memory 2 Semi-Custom IC 3 Particular Purpose IC 4 General Purpose Linear IC 5 Transistor / Diode / Thyristor 6 Microwave Device / Consumer Use High Frequency Device 7 Optical Device 8
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PD7500
X10679EJAV0SG00
MF-1134)
1995P
uPC2581
uPC2002
2sd1557
uPA67C
uPB582
upc1237
uPC317
2P4M PIN DIAGRAM
2SC4328
uPC157
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NEC marking code A4X
Abstract: 2XD marking
Text: DATA SHEET NEC MOS INTEGRATED CIRCUIT 8M-bit Synchronous GRAM Description The //PD481850 is a synchronous graphics memory SGRAM organized as 131,072 words x 32 bits x 2 banks random access port. This device can operate up to 100 MHz by using synchronous interface. Also, it has 8-column Block Write function
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uPD481850
100-pin
S100GF-65-JBT
PD481850
/xPD481850.
PD481850GF-JBT:
NEC marking code A4X
2XD marking
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Untitled
Abstract: No abstract text available
Text: DATA SHEET NEC MOS INTEGRATED CIRCUIT ¿¿PD4 8 1 8 5 0 8M-bit Synchronous GRAM Description The ^PD481850 is a synchronous graphics memory SGRAM organized as 131,072 words x 32 bits x 2 banks random access port. This device can operate up to 100 MHz by using synchronous interface. Also, it has 8-column Block Write function
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OCR Scan
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PD481850
100-pin
F-65-JB
uPD481850
PD481850GF-JBT:
PD481850
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D481850
Abstract: NEC D481850 D481
Text: DATA SHEET NEC / MOS INTEGRATED CIRCUIT 481850 ¿ ÎP D 8M-bit Synchronous GRAM Description The ¿¿PD481850 is a synchronous graphics memory SGRAM organized as 131,072 words x 32 bits x 2 banks random access port. This device can operate up to 100 MHz by using synchronous interface. Also, it has 8-column Block Write function
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OCR Scan
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uPD481850
100-pin
S100GF-65-JBT
juPD481850
MPD481850GF-JBT:
D481850
NEC D481850
D481
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nec eric-2
Abstract: UPD481
Text: PRELIMINARY DATA SHEET NEC / MOS INTEGRATED CIRCUIT ¿¿PD4 8 1 8 5 0 8 M-bit Synchronous GRAM for Rev.L Description The /jPD 481 850 is a synchrono us graphics m em o ry SG R AM organized as 131,072 w ords x 32 b its x 2 banks random access port. T his device can ope rate up to 100 M Hz b y using synchronous interface.
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S100GF-65-JBT
UPD481850
PD481850.
/JPD481650GF-JBT
100-pin
nec eric-2
UPD481
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PD481850GF
Abstract: D481850
Text: DATA SHEET NEC MOS INTEGRATED CIRCUIT /¿PD 481850 8M-bit Synchronous GRAM Description The PD481850 is a synchronous graphics memory SGRAM organized as 131,072 words x 32 bits x 2 banks random access port. This device can operate up to 100 MHz by using synchronous interface. Also, it has 8-column Block Write function
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OCR Scan
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uPD481850
100-pin
-613i8
-787io
S1000F-W-JBT
b4E7525
DDb3T73
pPD481850.
/1PD481850GF-JBT:
PD481850GF
D481850
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT ^ 0 4 8 1 8 5 0 for Rev.L 8 M-BIT SYNCHRONOUS GRAM 128K-WORD BY 32-BIT BY 2-BANK Description The ,PD481850 is a synchronous graphics memory SGRAM organized as 131,072 words x 32 bits x 2 banks random access port.
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OCR Scan
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128K-WORD
32-BIT
uPD481850
100-pin
S100GF-65-JBT
juPD481850
PD481850.
PD481850GF-JBT
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D481850G
Abstract: t838 D481850
Text: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT ¿ P D 481850 f o r R e v . L 8 M-BIT SYNCHRONOUS GRAM 128K-WORD BY 32-BIT BY 2-BANK Description The /¿PD481850 is a synchronous graphics memory (SGRAM organized as 131,072 words x 32 bits x 2 banks random access port.
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OCR Scan
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128K-WORD
32-BIT
uPD481850
100-pin
D481850G
t838
D481850
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