A2F060
Abstract: No abstract text available
Text: Revision 10 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)
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A2F060
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OVM7690
Abstract: lis3dh STMPS2141STR L3G4200D STM32F2 MCBQVGA MCBSTM32F200 L3G4200 OV*7690 st802rt1a
Text: 3 4 PowerScale COPS NLPB3 PB3 A GND COP2 P2 PIP201 PIP202 PIP203 1 2 3 GND Power measurement B GND PIR601 COR6 R6 GND 2 PIIC202 RT 3 PIR602 PIIC203 PGD 10kPIIC204 4 SS COC27 C27 PIC2702 5 PIC222n 701 PIIC205 SGND CS 8 PIIC208 PIC1401 100nPIL201 COL2 L2 PID50C COD5
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PIP201
PIP202
PIP203
B340A
B340A
8012V01
8012V03
8012V02
10u/25V
PID10A
OVM7690
lis3dh
STMPS2141STR
L3G4200D
STM32F2
MCBQVGA
MCBSTM32F200
L3G4200
OV*7690
st802rt1a
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A2F500M3
Abstract: A2F500 A2F500 FG484 A2F200-FG484 A2F500 pin details A2F060 A2F060M A2F200M3 A2F200M3F-FG256 A2F200M3F
Text: Revision 9 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)
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A2F500M3
A2F500
A2F500 FG484
A2F200-FG484
A2F500 pin details
A2F060
A2F060M
A2F200M3
A2F200M3F-FG256
A2F200M3F
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PAP102
Abstract: LMH1983 PAC107 pic7801 PAC800 PAP101 PAC702 COC25 LP3878MR-ADJ pir320
Text: LMH1983 Evaluation Kit Users Guide LMH1983 Evaluation Kit Users Guide Version 1.0 2/4/10 Page 1 of 25 LMH1983 Evaluation Kit Users Guide INTRODUCTION The LMH1983 Evaluation Kit EVK allows for the evaluation of the LMH1983 3G/HD/SD Video Clock Generator with Audio Clock. The LMH1983 device is
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LMH1983
LMH1983
sofAX202
PAR4702
PAX203
PAP102
PAC107
pic7801
PAC800
PAP101
PAC702
COC25
LP3878MR-ADJ
pir320
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A2F500
Abstract: a2f500 CS288 AES128 CS288 FG256 FG484 PQ208 A2F200M3F CORE8051 A2F200
Text: Revision 7 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)
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A2F500
a2f500 CS288
AES128
CS288
FG256
FG484
PQ208
A2F200M3F
CORE8051
A2F200
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PAC300-2
Abstract: PAD703 PAC3201 PAR1501 PAJ1019 AU1042 AU1037 PAC3002 par3 PAD401
Text: COSO3 PASO201 COSO2 PASO301 COF1 COF2 PAF100 PAF200 PABJ301 COR28 COR29 COR30 COR31 COR24 COR25 COR26 COR27 PAU1204 PAU1205 PAR2402PAD604 PAD602 PAR2502 PAR2401PAD603 PAU1203PAU1202PAD601 PAU1201 PAR2501 PAU1304 PAU1305 PAR2601PAD704 PAR2701 PAD702 PAR2602PAD703
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PASO201
PASO301
PAF100
PAF200
PABJ301
COR28
COR29
COR30
COR31
COR24
PAC300-2
PAD703
PAC3201
PAR1501
PAJ1019
AU1042
AU1037
PAC3002
par3
PAD401
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Untitled
Abstract: No abstract text available
Text: Revision 0 Military Grade SmartFusion Customizable System-on-Chip cSoC Product Benefits • • 100% Military Temperature Tested and Qualified from –55°C to 125°C Not Susceptible to Neutron-Induced Configuration Loss Microcontroller Subsystem (MSS) •
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A2F500 FG484
Abstract: A2F060
Text: Revision 12 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)
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A2F500 FG484
A2F060
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Untitled
Abstract: No abstract text available
Text: Revision 5 SmartFusion Intelligent Mixed Signal FPGAs Microcontroller Subsystem MSS • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)
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A2F500 pin details
Abstract: A2F500 A2F060 A2F200 A2F200-fg256 IO05PDB0V0
Text: Revision 8 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)
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A2F500 pin details
A2F500
A2F060
A2F200
A2F200-fg256
IO05PDB0V0
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A2F500-FG484
Abstract: soc 1044 A2F060
Text: Revision 1 Military Grade SmartFusion Customizable System-on-Chip cSoC Product Benefits • • 100% Military Temperature Tested and Qualified from –55°C to 125°C Not Susceptible to Neutron-Induced Configuration Loss Microcontroller Subsystem (MSS) •
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A2F500-FG484
soc 1044
A2F060
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A2F200
Abstract: A2F200M3F A2F200M3F-FG256 A2F500 pin details A2F500 AES128 CS288 FG256 FG484 PQ208
Text: Revision 6 SmartFusion Intelligent Mixed Signal FPGAs Microcontroller Subsystem MSS • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)
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A2F200
A2F200M3F
A2F200M3F-FG256
A2F500 pin details
A2F500
AES128
CS288
FG256
FG484
PQ208
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pap103
Abstract: PAP101 PIR203 pap102
Text: LMH1983 Evaluation Kit Users Guide LMH1983 Evaluation Kit Users Guide Version 1.0 2/4/10 Page 1 of 25 LMH1983 Evaluation Kit Users Guide INTRODUCTION The LMH1983 Evaluation Kit EVK allows for the evaluation of the LMH1983 3G/HD/SD Video Clock Generator with Audio Clock. The LMH1983 device is
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LMH1983
LMH1983
pap103
PAP101
PIR203
pap102
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A2F200M3F-FG256
Abstract: A2F200M3F a2f50 b20 100 transister CS288 A2F060 A2F500 A2F200-FG484 transister di 505 AES128
Text: Revision 4 Actel’s SmartFusion Intelligent Mixed Signal FPGAs Microcontroller Subsystem MSS • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)
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Ba600
A2F200M3F-FG256
A2F200M3F
a2f50
b20 100 transister
CS288
A2F060
A2F500
A2F200-FG484
transister di 505
AES128
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