MT4C1024
Abstract: micron MT4C
Text: MICRON SEMICONDUCTOR INC b3E S • hlllSMR G007544 Ô3Ô B U R N MT4C1024 L 1 MEG X 1 DRAM |U|C=RON DRAM 1 MEG x 1 DRAM FEATURES PIN ASSIGNMENT (Top View) OPTIONS MARKING • Timing 60ns access 70ns access 80ns access -6 -7 -8 • Packages Plastic DIP (300 mil)
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G007544
MT4C1024
512-cycle
MT4C1024)
175mW
G7555
micron MT4C
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MT4C1024DJ-7
Abstract: No abstract text available
Text: MT4C1024 L 1 MEG X 1 DRAM MICRON • SEMICONDUCTOR. iHC 1 MEG x 1 DRAM DRAM STANDARD OR LOW POWER, EXTENDED REFRESH FEATURES • 512-cycle refresh in 8ms (MT4C1024) or 64ms (MT4C1024 L) • Industry-standard x l pinout, timing, functions and packages • High-performance CMOS silicon-gate process
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MT4C1024
512-cycle
MT4C1024)
175mW
18-Pin
11G3D
MT4C1024DJ-7
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Untitled
Abstract: No abstract text available
Text: MT4C1024 L MEG X 1 DRAM 1 MEG DRAM X 1 DRAM FEATURES PIN ASSIGNMENT Top View • Industry standard x l pinout, tim ing, functions and packages • High-perform ance, CM OS silicon-gate process • Single +5V ±10% power supply • Low power, .3mW standby; 150mW active, typical
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MT4C1024
150mW
512-cycle
18-Pin
MT4C1024L
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MT4C1024
Abstract: No abstract text available
Text: MICRO N T E C H N O L O G Y INC SSE D • 1=11154^ G D D 4 1 7 4 17T « M R N MT4C1024 L 1 MEG X 1 DRAM |VtlC=RON DRAM 1 MEG X 1 DRAM FEATURES PIN ASSIGNMENT Top View • Industry standard x l pinout, tim ing, functions and packages • High-perform ance, CM OS silicon-gate process
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MT4C1024
150mW
512-cycle
18-Pin
T4C1024I
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mt4c1024dj7
Abstract: mt4c1024dj-7
Text: |v > ll = R O MT4C1024 L 1 MEG X 1 DRAM Í\J DRAM 1 MEG X 1 DRAM LOW POWER, EXTENDED REFRESH O 3J > FEATURES PIN ASSIGNMENT (Top View • Industry standard x l pinout, timing, functions and packages • High-performance, CM OS silicon-gate process • Single +5V ±10% power supply
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MT4C1024
150mW
512-cycle
200nA
18-Pin
20-Pin
125ps
MT4C1Q24L
1024L
MT4C1024L
mt4c1024dj7
mt4c1024dj-7
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