Untitled
Abstract: No abstract text available
Text: PRELIMINARY A A |^ C a r ~ |l\J I MT2LSYT3272T1/T2, MT4LSY6472T1/T2 32K, 64K x 72 SYNCHRONOUS SRAM MODULE SYNCHRONOUS SRAM MODULE 32K, 64K x 72 SRAM +3.3V SUPPLY WITH CLOCKED, REGISTERED INPUTS AND BURST COUNTER FEATURES PIN ASSIGNMENT Top View • 80 p o sitio n d u al read -o u t d u al in -lin e m em o ry m o d u le
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MT2LSYT3272T1/T2,
MT4LSY6472T1/T2
D0-D63
Q0-Q63
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY M im O N I MT2LSYT3272T1/T2, MT4LSY6472T1/T2 32K, 64K X 72 SYNCHRONOUS SRAM MODULE SYNCHRONOUS SRAM MODULE 32K, 64K x 72 SRAM 256KB/512KB, 3.3V, FLOW-THROUGH SYNCHRONOUS BURST, SECONDARY CACHE MODULES FEATURES PIN ASSIGNMENT Front View 160-lead, dual-in-line memory module (DIMM)
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OCR Scan
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MT2LSYT3272T1/T2,
MT4LSY6472T1/T2
256KB/512KB,
160-lead,
160-Lead
160-PIN
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY a /II^ C a r iflV I I o„T MT2LSYT3272T1/T2, MT4LSY6472T1/T2 32K, 64K x 72 SYNCHRONOUS SRAM MODULE SYNCHRONOUS 32K, 64K x 72 SRAM « n A * i +3-3V s u p p l y w it h c l o c k e d , r e g i s t e r e d INPUTS AND BURST COUNTER n* r > • ■■ r
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MT2LSYT3272T1/T2,
MT4LSY6472T1/T2
0G1GL33
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY M T2LSYT3272T1/T2, M T4LSY6472T1/T2 32K. 64K X 72 S Y N C H R O N O U S SRAM M ODULE I^ IIC R O N SYNCHRONOUS SRAM MODULE 3 2 K, 64K x 72 SRAM 256KB/512KB, 3.3V, FLOW-THROUGH SYNCHRONOUS BURST, SECONDARY CACHE MODULES FEATURES PIN ASSIGNMENT Front View
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OCR Scan
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PDF
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T2LSYT3272T1/T2,
T4LSY6472T1/T2
160-lead,
256KB/512KB,
160-Lead
MT2LSYT3272T1
MT4LSY6472T1/T2
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