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    MRS 1031 Search Results

    MRS 1031 Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    JM38510/31004B2A Texas Instruments Quadruple 2-Input Positive-AND Gates 20-LCCC -55 to 125 Visit Texas Instruments Buy
    JM38510/31401B2A Texas Instruments Retriggerable Monostable Multivibrators 20-LCCC -55 to 125 Visit Texas Instruments Buy
    JM38510/31303BCA Texas Instruments Quadruple 2-Input Positive-NAND Schmitt Triggers 14-CDIP -55 to 125 Visit Texas Instruments Buy
    JM38510/31508B2A Texas Instruments Synchronous 4-Bit Up/Down Counters (Dual Clock With Clear) 20-LCCC -55 to 125 Visit Texas Instruments Buy
    JM38510/31003BDA Texas Instruments Dual 4-Input Positive-AND Gates 14-CFP -55 to 125 Visit Texas Instruments Buy
    JM38510/31402BFA Texas Instruments Dual Monostable Multivibrators With Schmitt-trigger Inputs 16-CFP -55 to 125 Visit Texas Instruments Buy

    MRS 1031 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    mr-1-10

    Abstract: MRK 1031 L MRK1031L PBT 30% gf rotary coded switch 16 positions smd code mrs micro-miniature switches mrk packing MRK1012B
    Text: 7 7.1 7.2 Rotary Switches Miniature Rotary Switches Series MR 164 Series MRS 165–168 Key Switches Series MRK 7.3 169–170 Microminiature Rotary Switches Series SMR 171 Miniature Rotary Switches Specifications: Contact rating: Contact resistance: Insulation resistance:


    Original     		PDF

    yamaha ym 1011

    Abstract: tc9200f sony 0642 KS9210 AB14 KS9241B 0642 sony KS5990
    Text: CD-ROM DECODER KS9241B NTRODUCTION 80−QFP−1420C The KS9241B is a CD-ROM Decoder LSl, enabled to perform the real-time Error Correction in CD-ROM Drives or CD-I players. It is suitable for the CD-ROM Drive. FEATURES • Compatible with CD-ROM Model1 and CD-I (Mode 2)


    Original     		PDF KS9241B 80-QFP-1420C KS9241B yamaha ym 1011 tc9200f sony 0642 KS9210 AB14 0642 sony KS5990

    sdcl

    Abstract: pin diagram for core i3 processor SDRAM Controller i3 processor sdram dram ADSP-21065L SDRAM
    Text:  6'5$0,17 5 $&( Figure 10-0. Listing 10-0. Table 10-0. The processor’s SDRAM interface enables it to transfer data to and from synchronous DRAM (SDRAM) at 2xCLKIN. The synchronous approach coupled with 2xCLKIN frequency supports data transfer at a high


    Original     		PDF ADDR23-0 ADSP-21065L 07LPLQJ6SHFLILFDWLRQV sdcl pin diagram for core i3 processor SDRAM Controller i3 processor sdram dram SDRAM

    PC26400

    Abstract: No abstract text available
    Text: May 2007 HYS64T128020EDL–[2.5/3S/3.7]–B 200-Pin DDR2 SDRAM Modules DDR2 SDRAM SO-DIMM RoHS Compliant Products Internet Data Sheet Rev. 1.1 Internet Data Sheet HYS64T128020EDL–[2.5/3S/3.7]–B Small Outlined DDR2 SDRAM Modules HYS64T128020EDL–[2.5/3S/3.7]–B


    Original     		PDF HYS64T128020EDL­ 200-Pin HYS64T128020EDL-2 HYS64T128020EDL-3S-B PC26400

    HYS64T128020EDL-3S-B

    Abstract: PC2-6400-666 633 3f 6400E DDR2 SDRAM component data sheet pc2-6400s 666 800E DDR2-400 HYS64T128020EDL PC2-5300
    Text: October 2007 HYS64T128020EDL–[2.5/3S/3.7]–B 2 0 0 - P i n S m a l l - O u t l i n e d D D R 2 S D R A M Mo d u l e s DDR2 SDRAM SO-DIMM SDRAM RoHS Compliant Internet Data Sheet Rev. 1.12 Internet Data Sheet HYS64T128020EDL–[2.5/3S/3.7]–B Small Outlined DDR2 SDRAM Modules


    Original     		PDF HYS64T128020EDL­ HYS64T128020EDL-2 HYS64T128020EDL-3S-B 20ings HYS64T128020EDL-3S-B PC2-6400-666 633 3f 6400E DDR2 SDRAM component data sheet pc2-6400s 666 800E DDR2-400 HYS64T128020EDL PC2-5300

    Untitled

    Abstract: No abstract text available
    Text: SG5721G4AH8P6UU April 23, 2009 Ordering Information Part Numbers Description Module Speed SG5721G4AH8P6KA 1Gx72 8GB , DDR3, 240-pin Registered DIMM, Parity, ECC, CoolFlex, 256Mx4 Based, DDR3-800-555, 30.40mm, Green Module (RoHS Compliant). PC3-6400 @ CL 5, 6


    Original     		PDF SG5721G4AH8P6UU SG5721G4AH8P6KA 1Gx72 240-pin 256Mx4 DDR3-800-555, PC3-6400 SG5721G4AH8P66B

    IEEE754

    Abstract: TMS320C80
    Text: TMS320C80 MVP Transfer Controller User’s Guide Literature Number: SPRU105B March 1998 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest


    Original     		PDF TMS320C80 SPRU105B Index-26 IEEE754 TMS320C80

    0x10000002

    Abstract: IEEE754 TMS320C80 0x02000008 1214T
    Text: TMS320C80 MVP Transfer Controller User’s Guide Literature Number: SPRU105B March 1998 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest


    Original     		PDF TMS320C80 SPRU105B Index-26 0x10000002 IEEE754 TMS320C80 0x02000008 1214T

    SLGSSTE32882-A04B

    Abstract: DDR3U SLGSSTE32882 SLGSSTE32882-B04B DDR3L DDR3U-1333 ddr3 RDIMM pinout XLXX JESD79-3 RC10
    Text: SLGSSTE32882 DDR3 Registering Clock Driver with Parity and Quad Chip Selects Features • 28-bit 1:2 or 26-bit 1:2 and 4-bit 1:1 registering clock driver with parity • Supports high density DDR3 modules • Quad Chip Selects • Supports 1.25V up to DDR3U-1333 , 1.35V (up to DDR3L-1333), and 1.5V (up to DDR3-1600)


    Original     		PDF SLGSSTE32882 28-bit 26-bit DDR3U-1333) DDR3L-1333) DDR3-1600) 176-TFBGA 000-0032882-10g SLGSSTE32882-A04B DDR3U SLGSSTE32882 SLGSSTE32882-B04B DDR3L DDR3U-1333 ddr3 RDIMM pinout XLXX JESD79-3 RC10

    DDR3U

    Abstract: DDR3U-1866 SLGSSTE32882 top 261 yn JESD79-3 dba1 DDR3L DDR3-2133 RC10 RC11
    Text: SLGSSTE32882 DDR3 Registering Clock Driver with Parity and Quad Chip Selects Features • 28-bit 1:2 or 26-bit 1:2 and 4-bit 1:1 registering clock driver with parity • Supports high density DDR3 modules • Quad Chip Selects • Supports 1.25V up to DDR3U-1866 , 1.35V (up to DDR3L-1866), and 1.5V (up to DDR3-2133)


    Original     		PDF SLGSSTE32882 28-bit 26-bit DDR3U-1866) DDR3L-1866) DDR3-2133) 176-TFBGA 25hich DDR3U DDR3U-1866 SLGSSTE32882 top 261 yn JESD79-3 dba1 DDR3L DDR3-2133 RC10 RC11

    ADSP-21065L

    Abstract: No abstract text available
    Text: $'63/6+$5& 8VHU•V0DQXDO September 01, 1998 For the ADSP-21065L SHARC DSP 82-001833-01 Analog Devices, Inc. Computer Products Division One Technology Way Norwood, Mass. 02062-9106  &RS\ULJKW,QIRUPDWLRQ 1996, 1997, 1998 Analog Devices, Inc., ALL RIGHTS RESERVED. This


    Original     		PDF ADSP-21065L

    10 16s capacitor smd

    Abstract: 226 smd capacitor RSM 2322 2222 632 series capacitor MOV 103 M 3 KV 336 smd CAPACITOR 2312 344 7 SMD resistor 474 2222 631 series capacitor SMD electrolytic capacitor
    Text: Information New products and highlights i Ceramic capacitors Information Page Multilayer ceramic capacitors, NP0 10 V - 4000 V Multilayer ceramic capacitors, X7R 10 V - 2000 V Multilayer ceramic capacitors, Y5V 10 V - 250 V General purpose, high voltage capacitors 1000 V to 3000 V X7R and Y5V


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    wp1l

    Abstract: 32X32 ADSP-TS101 TS101 reverse carry addition
    Text: ts_101_hwr.book Page i Friday, May 21, 2004 1:29 PM ADSP-TS101 TigerSHARC Processor Hardware Reference Revision 1.1, May 2004 Part Number 82-001996-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a ts_101_hwr.book Page ii Friday, May 21, 2004 1:29 PM


    Original     		PDF ADSP-TS101 64-Bit 32-Bit wp1l 32X32 TS101 reverse carry addition

    L6284

    Abstract: A1273 L6283 a1046 L6278 L6559 l6262 a1583e A1154 a1273* transistor
    Text: RVCT 2.0 Build Tools - Errors and Warnings Release 1.0 – 27th August 2003 Introduction This document illustrates the errors and warning messages that are generated by the Build Tools of ARM RealView Compilation Tools 2.0 and later. If you are using ADS ADS 1.2, 1.1 or 1.0.1 or RVCT 1.2


    Original     		PDF L6875W: L6284 A1273 L6283 a1046 L6278 L6559 l6262 a1583e A1154 a1273* transistor

    MR4010

    Abstract: mr4010 equivalent MR4010 circuit MUX31H LSI coreware library B010 R3000 R4000 LCB500K CW4010
    Text: MiniRISC MR4010 Superscalar Microprocessor Reference Device Contents 1 2 3 4 5 6 7 8 9 MR4010 Features MR4010 Functional Blocks 2.1 CW4010 Shell 2.2 Synchronous DRAM Controller DRAMC 2.3 SCbus to Local I/O Bus (Lbus) Controller (SCLC) 2.4 PLL Clock Circuit


    Original     		PDF MR4010 MR4010 CW4010 mr4010 equivalent MR4010 circuit MUX31H LSI coreware library B010 R3000 R4000 LCB500K

    bosch ecu pinout

    Abstract: SPC560P BOSCH ECU microcontroller RM0022 bosch edc 15 bosch me 7.6.3 flex ecu bosch bosch ecu 0 261 200 218 connection diagram ISO26262 BOSCH ECU voltage line
    Text: RM0022 Reference manual 32-bit MCU family built on the Power Architecture embedded category for automotive chassis and safety electronics applications Introduction The SPC560Pxx is the first member of a family of microcontrollers based on the Power ArchitectureTM targeting chassis and safety market segment, specifically the Electrical


    Original     		PDF RM0022 32-bit SPC560Pxx bosch ecu pinout SPC560P BOSCH ECU microcontroller RM0022 bosch edc 15 bosch me 7.6.3 flex ecu bosch bosch ecu 0 261 200 218 connection diagram ISO26262 BOSCH ECU voltage line

    Untitled

    Abstract: No abstract text available
    Text: MEMORY CMOS 4 x 1 M x 16 BIT SYNCHRONOUS DYNAMIC RAM MB81F641642C-102/-103/-102L/-103L CMOS 4-Bank x 1,048,576-Word x 16 Bit Synchronous Dynamic Random Access Memory • DESCRIPTION The Fujitsu MB81F641642C is a CMOS Synchronous Dynamic Random Access Memory SDRAM containing


    OCR Scan     		PDF MB81F641642C-102/-103/-102L/-103L 576-Word MB81F641642C 16-bit 54-pin FPT-54P-M02)

    Untitled

    Abstract: No abstract text available
    Text: MEMORY CMOS 4 x 4 M x 4 BIT SYNCHRONOUS DYNAMIC RAM MB81F64442C-102/-103/-102L/-103L CMOS 4-Bank x 4,194,304-Word x 4 Bit Synchronous Dynamic Random Access Memory • DESCRIPTION The Fujitsu MB81F64442C is a CMOS Synchronous Dynamic Random Access Memory SDRAM containing


    OCR Scan     		PDF MB81F64442C-102/-103/-102L/-103L 304-Word MB81F64442C 54-pin FPT-54P-M02) F54003S-1C-1

    Untitled

    Abstract: No abstract text available
    Text: MEMORY CMOS 4 x 2 M x 8 BIT SYNCHRONOUS DYNAMIC RAM MB81F64842C-102/-103/-102L/-103L CMOS 4-Bank x 2,097,152-Word x 8 Bit Synchronous Dynamic Random Access Memory • DESCRIPTION The Fujitsu MB81F64842C is a CMOS Synchronous Dynamic Random Access Memory SDRAM containing


    OCR Scan     		PDF MB81F64842C-102/-103/-102L/-103L 152-Word MB81F64842C 54-pin FPT-54P-M02)

    F641642C

    Abstract: f64164
    Text: MEMORY CMOS 4 x 1 M x 16 BIT SYNCHRONOUS DYNAMIC RAM MB81F641642C-102/-103/-102L/-103L CMOS 4-Bank x 1,048,576-Word x 16 Bit Synchronous Dynamic Random Access Memory DESCRIPTION The Fujitsu MB81F641642C is a CMOS Synchronous Dynamic Random Access,Memory SDRAM containing


    OCR Scan     		PDF MB81F641642C-102/-103/-102L/-103L 576-Word MB81F641642C 16-bit F641642C f64164

    Untitled

    Abstract: No abstract text available
    Text: MEMORY CMOS 4 x 2 M x 8 BIT SYNCHRONOUS DYNAMIC RAM MB81F64842C-102/-103/-102L/-103L CMOS 4-Bank x 2,097,152-Word x 8 Bit Synchronous Dynamic Random Access Memory • DESCRIPTION The Fujitsu MB81F64842C is a CMOS Synchronous Dynamic Random Access Memory SDRAM containing


    OCR Scan     		PDF MB81F64842C-102/-103/-102L/-103L 152-Word MB81F64842C 842IC MB81F64842CSDRAM

    T54P

    Abstract: No abstract text available
    Text: MEMORY CMOS 4 x 4 M x 4 BIT SYNCHRONOUS DYNAMIC RAM MB81F64442C-102/-103/-102L/-103L CMOS 4-Bank x 4,194,304-Word x 4 Bit Synchronous Dynamic Random Access Memory • DESCRIPTION The Fujitsu MB81F64442C is a CMOS Synchronous Dynamic Random; AecessM em ory SDRAM containing


    OCR Scan     		PDF MB81F64442C-102/-103/-102L/-103L 304-Word MB81F64442C D-63303 F9802 T54P

    Untitled

    Abstract: No abstract text available
    Text: HM5216326 Serie 16M LVTTL interface SGRAM 2-Mword x 32-bit 125 MHz/100 MHz/83 MHz HITACHI ADE-203-678B (Z) Preliminary, Rev. 0.3 Jan. 14,1998 Description All inputs and outputs signals refers to the rising edge of the clock input. The HM5216326 provides 2


    OCR Scan     		PDF HM5216326 32-bit) Hz/100 Hz/83 ADE-203-678B FP-100H TFP-100H

    D4516821G5-A12

    Abstract: nec 14t t4 bst 1046 xrba IC-3394 ba6x PD4516421 D4516821 nec 44pin SN1049
    Text: DATA SHEET NEC MOS INTEGRATED CIRCUIT fd>D4516421, 4516821, 4516161 16M-bit Synchronous DRAM Description The jiPD4516421, 4516821, 4516161 are high-speed 16,777,216-bit synchronous dynam ic random-access memories, organized as 2,097,152x4x2, 1,048,576x8x2 and 524,288x16x2 wordxbitxbank , respectively.


    OCR Scan     		PDF D4516421, 16M-bit uPD4516421 uPD4516821 uPD4516161 216-bit 152x4x2, 288x16x2 44-pin 50-pin D4516821G5-A12 nec 14t t4 bst 1046 xrba IC-3394 ba6x PD4516421 D4516821 nec 44pin SN1049