54ALS00
Abstract: No abstract text available
Text: M O TO R O LA M ilitary 5 4 A L S0 0 Q u ad 2-Input P o sitiv e IM AN D G ate ELECTRICALLY TESTED PER: MPG54ALS00 AVAILABLE AS: LOGIC DIAGRAM Vcc B4 A4 Y4 1 JAN: N/A 2) SM D: N/A 3) 883C: 54ALS0Q/BXAJC B3 X = CASE OUTLINE A S FOLLOWS: PACKAGE: CERDIP: C CERFLAT:D
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MPG54ALS00
54ALS0Q/BXAJC
IL-STD-883
54ALS00
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y338
Abstract: 54ALS00
Text: M O TO R O LA M ilita ry 5 4 A LS 0 0 Quad 2-Input Positive NAND Gate ELECTRICALLY TESTED PER: MPG54ALS00 AVAILABLE AS: LOGIC DIAGRAM V cc B4 A4 Y4 r¡4~i r»3~i [~üi B3 A3 1 JAN: N/A 2) SMD: N/A Y3 rrri nn m it i 3) 883C: 54ALS00/BXAJC X = CASE OUTLINE AS FOLLOWS:
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MPG54ALS00
54ALS00
54ALSOO/BXAJC
125-C
MIL-STD-883
y338
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54ALS00
Abstract: ITA 6 V 5 B4
Text: MOTOROLA M ilitary 5 4 A L S0 0 Quad 2 -In p u t P o sitive N A N D G ate ELECTRICALLY TESTED PER: MPG54ALS00 AVAILABLE AS: LOGIC DIAGRAM V CC B4 fui fïïi A4 Y4 B3 A3 1 JAN: N/A Y3 2) SMD: HiA 3) 883C: 54ALSOO/BXAJC m m ra irn m X = CASE O UTUNE AS FOLLOWS:
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MPG54ALS00
54ALSOO/BXAJC
54ALS00
ITA 6 V 5 B4
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