MDB105
Abstract: sot762 footprint MNA423 74ALVC74 74ALVC74BQ 74ALVC74D 74ALVC74PW DHVQFN14 TSSOP14 2SD92
Text: INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 2003 Jan 24 2003 May 26 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;
|
Original
|
74ALVC74
74ALVC74
JESD8B/JESD36
SCA75
613508/03/pp20
MDB105
sot762 footprint
MNA423
74ALVC74BQ
74ALVC74D
74ALVC74PW
DHVQFN14
TSSOP14
2SD92
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 74HC74-Q100; 74HCT74-Q100 Dual D-type flip-flop with set and reset; positive edge-trigger Rev. 2 — 6 September 2013 Product data sheet 1. General description The 74HC74-Q100; 74HCT74-Q100 are dual positive edge triggered D-type flip-flop with individual data nD , clock (nCP), set (nSD) and reset (nRD) inputs, and complementary
|
Original
|
74HC74-Q100;
74HCT74-Q100
74HCT74-Q100
|
PDF
|
74LVC74A
Abstract: 74LVC74AD 74LVC74ADB 74LVC74APW JESD22-A114D SSOP14 TSSOP14
Text: 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Rev. 06 — 4 June 2007 Product data sheet 1. General description The 74LVC74A is a dual edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and (RD) inputs, and complementary Q and Q outputs.
|
Original
|
74LVC74A
74LVC74A
74LVC74AD
74LVC74ADB
74LVC74APW
JESD22-A114D
SSOP14
TSSOP14
|
PDF
|
MNA423
Abstract: 74LV74
Text: 74LV74 Dual D-type flip-flop with set and reset; positive edge-trigger Rev. 03 — 28 September 2007 Product data sheet 1. General description The 74LV74 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC74 and 74HCT74. The device is a dual positive edge triggered D-type flip-flop with individual data D inputs,
|
Original
|
74LV74
74LV74
74HC74
74HCT74.
MNA423
|
PDF
|
MNA423
Abstract: 74LVC74A 74LVC74AD 74LVC74ADB 74LVC74APW
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1998 Jun 17 2002 Jun 18 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge
|
Original
|
74LVC74A
74LVC74A
SCA74
613508/03/pp20
MNA423
74LVC74AD
74LVC74ADB
74LVC74APW
|
PDF
|
MNA423
Abstract: MDB105 smd transistor 2Q 74LVC74A 74LVC74ABQ 74LVC74AD 74LVC74ADB 74LVC74APW SSOP14 TSSOP14
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 2002 Jun 18 2003 May 26 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;
|
Original
|
74LVC74A
74LVC74A
SCA75
613508/04/pp24
MNA423
MDB105
smd transistor 2Q
74LVC74ABQ
74LVC74AD
74LVC74ADB
74LVC74APW
SSOP14
TSSOP14
|
PDF
|
MNA423
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Preliminary specification File under Integrated Circuits, IC24 2002 Apr 17 Philips Semiconductors Preliminary specification Dual D-type flip-flop with set and reset;
|
Original
|
74ALVC74
JESD8B/JESD36
MNA423
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 74LVC74A-Q100 Dual D-type flip-flop with set and reset; positive-edge trigger Rev. 2 — 5 April 2013 Product data sheet 1. General description The 74LVC74A-Q100 is a dual edge triggered D-type flip-flop. It has individual data nD inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ
|
Original
|
74LVC74A-Q100
74LVC74A-Q100
74LVC74A
|
PDF
|
74HC74
Abstract: 74HC74 application note 74HCT74 74HCT74 DATASHEET 74HC74 datasheet 74HC74N Current 74HCT74 74hc74 pin diagram 74HC74 application TTL 74hc74
Text: INTEGRATED CIRCUITS DATA SHEET 74HC74; 74HCT74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1998 Feb 23 2003 Jul 10 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;
|
Original
|
74HC74;
74HCT74
74HC/HCT74
SCA75
613508/03/pp22
74HC74
74HC74 application note
74HCT74
74HCT74 DATASHEET
74HC74 datasheet
74HC74N
Current 74HCT74
74hc74 pin diagram
74HC74 application
TTL 74hc74
|
PDF
|
74HC74
Abstract: 74hc74 pin diagram 74HCT74 74HC74 application HCT74 74HC74N 74HC74DB 74HC74 application note 74HCT74N CI 74hc74
Text: 74HC74; 74HCT74 Dual D-type flip-flop with set and reset; positive edge-trigger Rev. 4 — 27 August 2012 Product data sheet 1. General description The 74HC74 and 74HCT74 are dual positive edge triggered D-type flip-flop. They have individual data nD , clock (nCP), set (nSD) and reset (nRD) inputs, and complementary
|
Original
|
74HC74;
74HCT74
74HC74
74HCT74
HCT74
74hc74 pin diagram
74HC74 application
HCT74
74HC74N
74HC74DB
74HC74 application note
74HCT74N
CI 74hc74
|
PDF
|
74HC74
Abstract: 74HC74-Q100 74HC74 application note 74HC74 application 74HCT74 CI 74hc74 Current 74HCT74 TTL 74hc74 74hc74 pin diagram 74HC74BQ
Text: 74HC74-Q100; 74HCT74-Q100 Dual D-type flip-flop with set and reset; positive edge-trigger Rev. 1 — 7 August 2012 Product data sheet 1. General description The 74HC74-Q100; 74HCT74-Q100 are dual positive edge triggered D-type flip-flop with individual data nD , clock (nCP), set (nSD) and reset (nRD) inputs, and complementary
|
Original
|
74HC74-Q100;
74HCT74-Q100
74HCT74-Q100
74HC74
74HC74-Q100
74HC74 application note
74HC74 application
74HCT74
CI 74hc74
Current 74HCT74
TTL 74hc74
74hc74 pin diagram
74HC74BQ
|
PDF
|
MNA423
Abstract: 74LVC74
Text: INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification 2002 Nov 15 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74
|
Original
|
74ALVC74
JESD8B/JESD36
EIA/JESD22-A114-A
EIA/JESD22-A115-A
SCA74
613508/01/pp20
MNA423
74LVC74
|
PDF
|
2sd 209 l
Abstract: MNA423 06291 smd transistor 2Q 74AHC74 74AHC74D 74AHC74PW 74AHCT74 74AHCT74D 74AHCT74PW
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC74; 74AHCT74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1999 Aug 05 File under Integrated Circuits, IC06 1999 Sep 23 Philips Semiconductors Product specification
|
Original
|
74AHC74;
74AHCT74
EIA/JESD22-A114-A
EIA/JESD22-A115-A
545002/02/pp20
2sd 209 l
MNA423
06291
smd transistor 2Q
74AHC74
74AHC74D
74AHC74PW
74AHCT74
74AHCT74D
74AHCT74PW
|
PDF
|
74AHCT74PW-Q100
Abstract: No abstract text available
Text: 74AHC74-Q100; 74AHCT74-Q100 Dual D-type flip-flop with set and reset; positive-edge trigger Rev. 1 — 16 April 2013 Product data sheet 1. General description The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL LSTTL . It is specified in compliance with
|
Original
|
74AHC74-Q100;
74AHCT74-Q100
74AHCT74-Q100
AHCT74
74AHCT74PW-Q100
|
PDF
|
|
MNA423
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC74; 74AHCT74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 1999 Sep 23 2004 Apr 29 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;
|
Original
|
74AHC74;
74AHCT74
EIA/JESD22-A114-B
EIA/JESD22-A115-A
74AHC74
74AHCT74
MNA423
|
PDF
|
06291
Abstract: 74AHC74 74AHC74BQ 74AHC74D 74AHC74PW 74AHCT74 DHVQFN14 TSSOP14 74AHC74 pin diagram 14504
Text: 74AHC74; 74AHCT74 Dual D-type flip-flop with set and reset; positive-edge trigger Rev. 04 — 7 February 2005 Product data sheet 1. General description The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard
|
Original
|
74AHC74;
74AHCT74
74AHCT74
06291
74AHC74
74AHC74BQ
74AHC74D
74AHC74PW
DHVQFN14
TSSOP14
74AHC74 pin diagram
14504
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 74HC74-Q100; 74HCT74-Q100 Dual D-type flip-flop with set and reset; positive edge-trigger Rev. 1 — 7 August 2012 Product data sheet 1. General description The 74HC74-Q100; 74HCT74-Q100 are dual positive edge triggered D-type flip-flop with individual data nD , clock (nCP), set (nSD) and reset (nRD) inputs, and complementary
|
Original
|
74HC74-Q100;
74HCT74-Q100
74HCT74-Q100
|
PDF
|
smd transistor 2Q
Abstract: MNA423 74ALVC74 74ALVC74D 74ALVC74PW TSSOP14
Text: INTEGRATED CIRCUITS DATA SHEET 74ALVC74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 2002 Nov 15 2003 Jan 24 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;
|
Original
|
74ALVC74
74ALVC74
JESD8B/JESD36
SCA75
613508/02/pp20
smd transistor 2Q
MNA423
74ALVC74D
74ALVC74PW
TSSOP14
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Rev. 7 — 20 November 2012 Product data sheet 1. General description The 74LVC74A is a dual edge triggered D-type flip-flop with individual data nD inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs.
|
Original
|
74LVC74A
74LVC74A
|
PDF
|
MNA423
Abstract: 74AHC74 pin diagram
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC74; 74AHCT74 Dual D-type flip-flop with set and reset; positive-edge trigger Product specification File under Integrated Circuits, IC06 1999 Aug 05 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;
|
Original
|
74AHC74;
74AHCT74
EIA/JESD22-A114-A
EIA/JESD22-A115-A
74AHC/AHCT74
245002/01/pp20
MNA423
74AHC74 pin diagram
|
PDF
|
MNA423
Abstract: MDB105 Z148
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Product specification Supersedes data of 2002 Jun 18 2003 Feb 28 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset;
|
Original
|
74LVC74A
EIA/JESD22-A114-A
EIA/JESD22-A115-A
74LVC74A
MNA423
MDB105
Z148
|
PDF
|