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    74HC_HCT138

    Abstract: 74HC138 data sheet 74HC138 EQUIVALENT 74HCT138 74HC138DB 74HC138N hct138d 74HC138 philips 74HCT138 74HC138PW
    Text: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 03 — 23 December 2005 Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


    Original     		PDF 74HC138; 74HCT138 74HCT138 74HC_HCT138 74HC138 data sheet 74HC138 EQUIVALENT 74HCT138 74HC138DB 74HC138N hct138d 74HC138 philips 74HC138PW

    Untitled

    Abstract: No abstract text available
    Text: 74LVC138A 3-to-8 line decoder/demultiplexer; inverting Rev. 5 — 19 October 2011 Product data sheet 1. General description The 74LVC138A is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs A0, A1 and A2 and, when enabled, provides eight mutually exclusive


    Original     		PDF 74LVC138A 74LVC138A 1-of-32

    Untitled

    Abstract: No abstract text available
    Text: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 4 — 27 June 2012 Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


    Original     		PDF 74HC138; 74HCT138 74HCT138

    74HC138

    Abstract: hct138d 74HC138D HCT138 74HC138 philips 74HC138DB 74HC138N 74HC138PW 74HCT138 74HCT138N
    Text: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


    Original     		PDF 74HC138; 74HCT138 74HCT138 74HC138 hct138d 74HC138D HCT138 74HC138 philips 74HC138DB 74HC138N 74HC138PW 74HCT138N

    Untitled

    Abstract: No abstract text available
    Text: 74AHC138-Q100; 74AHCT138-Q100 3-to-8 line decoder/demultiplexer; inverting Rev. 1 — 26 March 2013 Product data sheet 1. General description The 74AHC138-Q100; 74AHCT138-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance


    Original     		PDF 74AHC138-Q100; 74AHCT138-Q100 74AHCT138-Q100 AHCT138

    74HC138 using for testing equipment

    Abstract: MNA370 DHVQFN16 SOT763-1 74HC138 74HCT138 74LV138 74LV138BQ 74LV138D 74LV138DB
    Text: 74LV138 3-to-8 line decoder/demultiplexer; inverting Rev. 03 — 15 November 2007 Product data sheet 1. General description The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC138 and 74HCT138. The 74LV138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted


    Original     		PDF 74LV138 74LV138 74HC138 74HCT138. 1-of-32 74HC138 using for testing equipment MNA370 DHVQFN16 SOT763-1 74HCT138 74LV138BQ 74LV138D 74LV138DB

    74HC138

    Abstract: related circuit of 74HC138 001aae059 74HC-HCT138 74hc138bq hct138 74HC138 using for testing equipment 74HC138D 74HC138N 74HC138DB
    Text: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 4 — 27 June 2012 Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


    Original     		PDF 74HC138; 74HCT138 74HCT138 74HC138 related circuit of 74HC138 001aae059 74HC-HCT138 74hc138bq hct138 74HC138 using for testing equipment 74HC138D 74HC138N 74HC138DB

    5 to 32 decoder

    Abstract: 5 to 32 decoder circuit YN 1041 top 244 yn MNA370 Decoder 5 to 32 74AHC138 74AHC138D 74AHC138PW 74AHCT138
    Text: INTEGRATED CIRCUITS DATA SHEET 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Product specification Supersedes data of 1999 Mar 31 File under Integrated Circuits, IC06 1999 Sep 27 Philips Semiconductors Product specification 74AHC138; 74AHCT138


    Original     		PDF 74AHC138; 74AHCT138 EIA/JESD22-A114-A EIA/JESD22-A115-A EIA/JESD22-C101 74AHC/AHCT138 245002/02/pp16 5 to 32 decoder 5 to 32 decoder circuit YN 1041 top 244 yn MNA370 Decoder 5 to 32 74AHC138 74AHC138D 74AHC138PW 74AHCT138

    Untitled

    Abstract: No abstract text available
    Text: 74AHC138-Q100; 74AHCT138-Q100 3-to-8 line decoder/demultiplexer; inverting Rev. 2 — 2 April 2014 Product data sheet 1. General description The 74AHC138-Q100; 74AHCT138-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance


    Original     		PDF 74AHC138-Q100; 74AHCT138-Q100 74AHCT138-Q100 AHCT138

    Untitled

    Abstract: No abstract text available
    Text: 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 03 — 28 November 2007 Product data sheet 1. General description The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL LSTTL . They are specified in compliance with


    Original     		PDF 74AHC138; 74AHCT138 74AHCT138 AHCT138

    MNA370

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC138A 3-to-8 line decoder/demultiplexer; inverting Product specification Supersedes data of 2002 Mar 12 2003 Mar 26 Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting 74LVC138A FEATURES


    Original     		PDF 74LVC138A EIA/JESD22e MNA370

    MNA370

    Abstract: 74AHC138 74AHC138BQ 74AHC138D 74AHC138PW 74AHCT138 74AHCT138D 74AHCT138PW JESD22-A114E
    Text: 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Product data sheet 1. General description The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL LSTTL . They are specified in compliance with


    Original     		PDF 74AHC138; 74AHCT138 74AHCT138 OT403-1 MO-153 TSSOP16) MNA370 74AHC138 74AHC138BQ 74AHC138D 74AHC138PW 74AHCT138D 74AHCT138PW JESD22-A114E

    74HC138

    Abstract: 001aae059 74HC138PW 74HCT138 hct138d 74HCT138-Q100 74HC138-Q100 74HC138 using for testing equipment 74hc138bq 74HC-HCT138
    Text: 74HC138-Q100; 74HCT138-Q100 3-to-8 line decoder/demultiplexer; inverting Rev. 1 — 16 July 2012 Product data sheet 1. General description The 74HC138-Q100; 74HCT138-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL .


    Original     		PDF 74HC138-Q100; 74HCT138-Q100 74HCT138-Q100 74HC138 001aae059 74HC138PW 74HCT138 hct138d 74HC138-Q100 74HC138 using for testing equipment 74hc138bq 74HC-HCT138

    Untitled

    Abstract: No abstract text available
    Text: 74LVC138A-Q100 3-to-8 line decoder/demultiplexer; inverting Rev. 1 — 4 April 2013 Product data sheet 1. General description The 74LVC138A-Q100 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs A0, A1 and A2 . When the inputs are enabled, it provides eight


    Original     		PDF 74LVC138A-Q100 74LVC138A-Q100 1-of-32 74LVC138A

    74HC138

    Abstract: hct138d 74HCT138 74HC138D 74HC138DB 74HC138N 74HC138PW MNA370 74HC-HCT138 74HC138 philips
    Text: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


    Original     		PDF 74HC138; 74HCT138 74HCT138 74HC138 hct138d 74HC138D 74HC138DB 74HC138N 74HC138PW MNA370 74HC-HCT138 74HC138 philips

    SOT763-1 FOOTPRINT

    Abstract: MNA370 74LVC138A 74LVC138ABQ 74LVC138AD 74LVC138ADB 74LVC138APW SSOP16 TSSOP16 SOT33
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC138A 3-to-8 line decoder/demultiplexer; inverting Product specification Supersedes data of 2002 Mar 12 2003 May 06 Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting 74LVC138A FEATURES


    Original     		PDF 74LVC138A 74LVC138A SCA75 613508/04/pp20 SOT763-1 FOOTPRINT MNA370 74LVC138ABQ 74LVC138AD 74LVC138ADB 74LVC138APW SSOP16 TSSOP16 SOT33

    Ic 74hc138 logic diagram

    Abstract: No abstract text available
    Text: 74HC138-Q100; 74HCT138-Q100 3-to-8 line decoder/demultiplexer; inverting Rev. 1 — 16 July 2012 Product data sheet 1. General description The 74HC138-Q100; 74HCT138-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL .


    Original     		PDF 74HC138-Q100; 74HCT138-Q100 74HCT138-Q100 Ic 74hc138 logic diagram

    Untitled

    Abstract: No abstract text available
    Text: 74LVC138A 3-to-8 line decoder/demultiplexer; inverting Rev. 5 — 19 October 2011 Product data sheet 1. General description The 74LVC138A is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs A0, A1 and A2 and, when enabled, provides eight mutually exclusive


    Original     		PDF 74LVC138A 74LVC138A 1-of-32

    MNA370

    Abstract: 74LVC138A 74LVC138AD 74LVC138ADB 74LVC138APW
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC138A 3-to-8 line decoder/demultiplexer; inverting Product specification Supersedes data of 1998 Apr 28 2002 Mar 12 Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting 74LVC138A FEATURES


    Original     		PDF 74LVC138A 74LVC138A SCA74 613508/03/pp16 MNA370 74LVC138AD 74LVC138ADB 74LVC138APW

    MNA370

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC138A 3-to-8 line decoder/demultiplexer; inverting Product specification File under Integrated Circuits, IC24 2002 Oct 30 Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting 74LVC138A


    Original     		PDF 74LVC138A MNA370

    MNA370

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Product specification File under Integrated Circuits, IC06 Philips Sem iconductors 1999 Mar 31 PHILIPS Philips Semiconductors Product specification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting


    OCR Scan     		PDF 74AHC138; 74AHCT138 EIA/JESD22-A114-A EIA/JESD22-A115-A 245002/00/01/pp16 MNA370

    74AHC138

    Abstract: 74AHC138D 74AHC138PW 74AHCT138 74AHCT138D 74AHCT138PW TTL Schmitt-Trigger LOW POWER SCHOTTKY
    Text: P hilips S em ico n d uctors Product sp ecification 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting FEA TUR ES D ES C R IPTIO N • ESD protection: H BM E IA /JE S D 22-A 114-A E xceeds 2 0 0 0 V MM E IA /JE S D 22-A 115-A E xceeds 200 V The 74A H C /A H C T 138 are high-speed S i-gate C M O S devices and are pin


    OCR Scan     		PDF 74AHC/AHCT138 1-of-32 74AHC138 74AHC138D 74AHC138PW 74AHCT138 74AHCT138D 74AHCT138PW TTL Schmitt-Trigger LOW POWER SCHOTTKY