Untitled
Abstract: No abstract text available
Text: 74LVC1G14 Single Schmitt-trigger inverter Rev. 12 — 6 August 2012 Product data sheet 1. General description The 74LVC1G14 provides the inverting buffer function with Schmitt-trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free
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74LVC1G14
74LVC1G14
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MARKING V7 6-PIN
Abstract: No abstract text available
Text: 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 11 — 6 July 2012 Product data sheet 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
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74LVC3G14
74LVC3G14
MARKING V7 6-PIN
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74LVC3G14
Abstract: 74LVC3G14DC 74LVC3G14DP 74LVC3G14GM 74LVC3G14GT JESD22-A114E MO-187
Text: 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 07 — 12 June 2008 Product data sheet 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger action. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of
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74LVC3G14
74LVC3G14
74LVC3G14DC
74LVC3G14DP
74LVC3G14GM
74LVC3G14GT
JESD22-A114E
MO-187
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HEF40106BP
Abstract: HEF40106B HEF40106BT HEF40106 MO-001
Text: HEF40106B Hex inverting Schmitt trigger Rev. 4 — 15 November 2010 Product data sheet 1. General description The HEF40106B provides six inverting buffers. Each input has a Schmitt trigger circuit. The inverting buffer switches at different points for positive-going and negative-going
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HEF40106B
HEF40106B
HEF40106BP
HEF40106BT
HEF40106
MO-001
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74AUP2G14
Abstract: 74AUP2G14GF 74AUP2G14GM 74AUP2G14GW
Text: 74AUP2G14 Low-power dual Schmitt trigger inverter Rev. 3 — 22 July 2010 Product data sheet 1. General description The 74AUP2G14 provides two inverting buffers with Schmitt trigger action which accept standard input signals. They are capable of transforming slowly changing input signals
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74AUP2G14
74AUP2G14
74AUP2G14GF
74AUP2G14GM
74AUP2G14GW
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74AUP1G14
Abstract: 74AUP1G14GF 74AUP1G14GM 74AUP1G14GW MO-203
Text: 74AUP1G14 Low-power Schmitt trigger inverter Rev. 4 — 13 July 2010 Product data sheet 1. General description The 74AUP1G14 provides a single inverting Schmitt trigger which accepts standard input signals. It is capable of transforming slowly changing input signals into sharply defined,
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74AUP1G14
74AUP1G14
74AUP1G14GF
74AUP1G14GM
74AUP1G14GW
MO-203
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hc1g14
Abstract: 74HCT1G14 74HC1G14 74HC1G14GW 74HCT1G14GW 74hct1g
Text: INTEGRATED CIRCUITS DATA SHEET 74HC1G14; 74HCT1G14 Inverting Schmitt-triggers Product specification Supersedes data of 1998 Aug 05 File under Integrated Circuits, IC06 2001 Mar 02 Philips Semiconductors Product specification Inverting Schmitt-triggers 74HC1G14; 74HCT1G14
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74HC1G14;
74HCT1G14
74HC1G/HCT1G14
613508/02/pp16
hc1g14
74HCT1G14
74HC1G14
74HC1G14GW
74HCT1G14GW
74hct1g
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74ALVC14
Abstract: 74ALVC14D 74ALVC14PW TSSOP14
Text: INTEGRATED CIRCUITS DATA SHEET 74ALVC14 Hex inverting Schmitt trigger Product specification 2003 Feb 03 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74ALVC14 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 3.6 V
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74ALVC14
74ALVC14
JESD8B/JESD36
SCA75
613508/01/pp16
74ALVC14D
74ALVC14PW
TSSOP14
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Untitled
Abstract: No abstract text available
Text: 74AUP2G14 Low-power dual Schmitt trigger inverter Rev. 4 — 1 December 2011 Product data sheet 1. General description The 74AUP2G14 provides two inverting buffers with Schmitt trigger action which accept standard input signals. They are capable of transforming slowly changing input signals
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74AUP2G14
74AUP2G14
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74LVC14A-Q100
Abstract: No abstract text available
Text: 74LVC14A-Q100 Hex inverting Schmitt trigger with 5 V tolerant input Rev. 1 — 7 August 2012 Product data sheet 1. General description The 74LVC14A-Q100 provides six inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output
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74LVC14A-Q100
74LVC14A-Q100
74LVC14A
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74AUP1G14
Abstract: 74AUP1G14GM 74AUP1G14GW JESD22-A114-C MO-203
Text: 74AUP1G14 Low-power Schmitt-trigger inverter Rev. 01 — 20 July 2005 Product data sheet 1. General description The 74AUP1G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. This device ensures a very low static and dynamic power consumption across the entire
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74AUP1G14
74AUP1G14
74AUP1G14GM
74AUP1G14GW
JESD22-A114-C
MO-203
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74LV14N
Abstract: No abstract text available
Text: 74LV14 Hex inverting Schmitt trigger Rev. 6 — 12 December 2011 Product data sheet 1. General description The 74LV14 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC14 and 74HCT14. The 74LV14 provides six inverting buffers with Schmitt-trigger input. It is capable of
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74LV14
74LV14
74HC14
74HCT14.
74LV14N
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74AUP2G14
Abstract: 74AUP2G14GF 74AUP2G14GM 74AUP2G14GW JESD22-A114E
Text: 74AUP2G14 Low-power dual Schmitt trigger inverter Rev. 02 — 3 July 2009 Product data sheet 1. General description The 74AUP2G14 provides two inverting buffers with Schmitt trigger action which accept standard input signals. They are capable of transforming slowly changing input signals
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74AUP2G14
74AUP2G14
74AUP2G14GF
74AUP2G14GM
74AUP2G14GW
JESD22-A114E
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Untitled
Abstract: No abstract text available
Text: 74AUP2G14 Low-power dual Schmitt trigger inverter Rev. 4 — 1 December 2011 Product data sheet 1. General description The 74AUP2G14 provides two inverting buffers with Schmitt trigger action which accept standard input signals. They are capable of transforming slowly changing input signals
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74AUP2G14
74AUP2G14
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Untitled
Abstract: No abstract text available
Text: 74AUP1G14 Low-power Schmitt trigger inverter Rev. 6 — 28 June 2012 Product data sheet 1. General description The 74AUP1G14 provides a single inverting Schmitt trigger which accepts standard input signals. It is capable of transforming slowly changing input signals into sharply defined,
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74AUP1G14
74AUP1G14
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Untitled
Abstract: No abstract text available
Text: XC7WH14 Triple inverting Schmitt trigger Rev. 5 — 7 February 2013 Product data sheet 1. General description The XC7WH14 is a high-speed Si-gate CMOS device. This device provides three inverting buffers with Schmitt trigger action. This device is capable of transforming slowly
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XC7WH14
XC7WH14
JESD22-A114F
JESD22-A115-A
JESD22-C101D
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BLD Schmitt-trigger
Abstract: 74AHC1G14 74AHC1G14GW 74AHCT1G14 74AHCT1G14GW
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC1G14; 74AHCT1G14 Inverting Schmitt trigger Product specification File under Integrated Circuits, IC06 1999 Aug 05 Philips Semiconductors Product specification Inverting Schmitt trigger FEATURES • Symmetrical output impedance
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74AHC1G14;
74AHCT1G14
EIA/JESD22-A114-A
EIA/JESD22-A115-A
245002/01/pp16
BLD Schmitt-trigger
74AHC1G14
74AHC1G14GW
74AHCT1G14
74AHCT1G14GW
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Untitled
Abstract: No abstract text available
Text: 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 12 — 9 April 2013 Product data sheet 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
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74LVC3G14
74LVC3G14
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74AHC3G14
Abstract: 74AHC3G14DP 74AHCT3G14 74AHCT3G14DP AHC3G14
Text: INTEGRATED CIRCUITS DATA SHEET 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger Product specification 2003 Nov 27 Philips Semiconductors Product specification Inverting Schmitt trigger 74AHC3G14; 74AHCT3G14 FEATURES APPLICATIONS • Symmetrical output impedance
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74AHC3G14;
74AHCT3G14
EIA/JESD22-A114-A
EIA/JESD22-A115-A
EIA/JESD22-C101
74AHC3G/AHCT3G14
SCA75
74AHC3G14
74AHC3G14DP
74AHCT3G14
74AHCT3G14DP
AHC3G14
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74LV14DB
Abstract: 74LV14N 74HC14 74HCT14 74LV14 74LV14BQ 74LV14D 74LV14PW
Text: 74LV14 Hex inverting Schmitt trigger Rev. 5 — 5 January 2011 Product data sheet 1. General description The 74LV14 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC14 and 74HCT14. The 74LV14 provides six inverting buffers with Schmitt-trigger input. It is capable of
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74LV14
74LV14
74HC14
74HCT14.
74LV14DB
74LV14N
74HCT14
74LV14BQ
74LV14D
74LV14PW
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Untitled
Abstract: No abstract text available
Text: 74HC3G14-Q100; 74HCT3G14-Q100 Triple inverting Schmitt trigger Rev. 2 — 9 December 2013 Product data sheet 1. General description The 74HC3G14-Q100; 74HCT3G14-Q100 is a triple inverter with Schmitt-trigger inputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface
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74HC3G14-Q100;
74HCT3G14-Q100
74HCT3G14-Q100
AEC-Q100
HCT3G14
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74HC14 DIP14
Abstract: 74LV14N 74HC14 74HCT14 74LV14 74LV14BQ 74LV14D 74LV14DB 74LV14PW JESD22-A114E
Text: 74LV14 Hex inverting Schmitt trigger Rev. 04 — 2 July 2009 Product data sheet 1. General description The 74LV14 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC14 and 74HCT14. The 74LV14 provides six inverting buffers with Schmitt-trigger input. It is capable of
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74LV14
74LV14
74HC14
74HCT14.
74HC14 DIP14
74LV14N
74HCT14
74LV14BQ
74LV14D
74LV14DB
74LV14PW
JESD22-A114E
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mna035
Abstract: MNB084 MNB082
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC2G14 Dual inverting Schmitt-trigger with 5 V tolerant input Product specification 2003 Jul 31 Philips Semiconductors Product specification Dual inverting Schmitt-trigger with 5 V tolerant input 74LVC2G14 FEATURES APPLICATIONS
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74LVC2G14
JESD8B/JESD36
OT363
OT457
EIA/JESD22-A114-A
EIA/JESD22-A115-A
SCA75
613508/01/pp15
mna035
MNB084
MNB082
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74LVC14AD
Abstract: wave footprint so14 SSOP14 package footprint
Text: INTEGRATED CIRCUITS DATA SHEET 74LVC14A Hex inverting Schmitt-trigger with 5 V tolerant input Product specification Supersedes data of 2002 Mar 15 2003 Feb 28 Philips Semiconductors Product specification Hex inverting Schmitt-trigger with 5 V tolerant input
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74LVC14A
EIA/JESD22-A114-A
EIA/JESD22-A115-A
01-Aug-00)
74LVC14AD
wave footprint so14
SSOP14 package footprint
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