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    MC74FXXXD Search Results

    MC74FXXXD Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    MC74FXXXDW Motorola Octal D Flip-Flop with Enable Original PDF

    MC74FXXXD Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    F381

    Abstract: No abstract text available
    Text: The MC54/74F182 is a high-speed carry lookahead generator. It is generally used with the F181, F381 or 29F01 4-bit arithmetic logic unit to provide high-speed lookahead over word lengths of more than four bits. • Provides Lookahead Carries Across a Group of Four ALUs


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    MC54/74F182 29F01 751/EUROPE/Locations F381 PDF

    74F568

    Abstract: MC54/74F568 MC74FXXXDW
    Text: MC54/74F568 MC54/74F569 4-BIT BIDIRECTIONAL COUNTERS WITH 3-STATE OUTPUTS The MC54/ 74F568 and MC54/74F569 are fully synchronous, reversible counters with 3-state outputs. The F568 is a BCD decade counter; the F569 is a binary counter. They feature preset capability for programmable operation, carry lookahead for easy cascading, and a U/D input to control the direction of counting. For maximum flexibility there are both synchronous and master asynchronous reset inputs as well as both Clocked Carry (CC) and


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    MC54/74F568 MC54/74F569 74F568 MC54/74F569 MC54/74F568 MC74FXXXDW PDF

    TS 4142

    Abstract: F169
    Text: MC54/74F168 MC54/74F169 4-STAGE SYNCHRONOUS BIDIRECTIONAL COUNTERS The MC54/74F168 and MC54/74F169 are fully synchronous 4-stage up/ down counters. The F168 is a BCD decade counter; the F169 is a modulo-16 binary counter. Both feature a preset capability for programmable operation,


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    MC54/74F168 MC54/74F169 MC54/74F168 MC54/74F169 modulo-16 TS 4142 F169 PDF

    MC74F579

    Abstract: MC74FXXXDW
    Text: 8-BIT BIDIRECTIONAL BINARY COUNTER 3-STATE The MC74F579 is a fully synchronous 8-stage up/down counter with multiplexed 3-state I/O ports for bus-oriented applications. It features a preset capability for programmable operation, carry look-ahead for easy cascading


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    MC74F579 MC74FXXXDW PDF

    motorola F74

    Abstract: 74F109
    Text: The MC54/74F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop refer to F74 data sheet by connecting the J and K inputs together.


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    MC54/74F109 motorola F74 74F109 PDF

    16 line to 4 line priority encoder

    Abstract: MC54/74F14 F148 4 line to 2 line priority encoder ttl priority encoder 74F148
    Text: MC54/74F148 8-LINE TO 3-LINE PRIORITY ENCODER The MC54/74F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expanded via input and output enables to provide priority encoding over many bits.


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    MC54/74F148 MC54/74F148 16 line to 4 line priority encoder MC54/74F14 F148 4 line to 2 line priority encoder ttl priority encoder 74F148 PDF

    3-bit binary adder circuit

    Abstract: 16C4 F283 circuit diagram of full adder circuit diagram of full adder circuit using nor 8 bit full adder 74
    Text: LIFETIME BUY The MC54/74F283 high-speed 4-bit binary full adder with internal carry lookahead, accepts two 4-bit binary words A0–A3, B0–B3 and a Carry input (C0). It generates the binary Sum outputs (S0–S3) and the Carry output (C4) from the most significant bit. The F283 will operate with either active-HIGH or


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    MC54/74F283 3-bit binary adder circuit 16C4 F283 circuit diagram of full adder circuit diagram of full adder circuit using nor 8 bit full adder 74 PDF

    74f259 motorola

    Abstract: 74f259
    Text: LIFETIME BUY The MC54/74F259 is a high-speed 8-bit addressable latch designed for general purpose storage applications in digital systems. It is a multifunctional device capable of storing single line data in eight addressable latches, and also a 1-of-8 decoder and demultiplexer with active HIGH outputs. The device


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    MC54/74F259 74f259 motorola 74f259 PDF

    f125 motorola

    Abstract: f126 751A-02 F125 74f125 motorola
    Text: MC54/74F125 MC54/74F126 3-STATE QUAD BUFFERS • High Impedance NPN Base Inputs for Reduced Loading QUAD BUFFERS, 3-STATE FAST SHOTTKY TTL MC54/74F125 VCC 4C 4A 4Y 3C 3A 3Y 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 7 1C 1A 1Y 2C 2A


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    MC54/74F125 MC54/74F126 51A-02 MC54FXXXJ MC74FXXXN MC74FXXXD f125 motorola f126 751A-02 F125 74f125 motorola PDF

    F151

    Abstract: No abstract text available
    Text: MC54/74F151 8-INPUT MULTIPLEXER The MC54/74F151 is a high-speed 8-input digital multiplexer. It provides in one package, the ability to select one line of data from up to eight sources. The F151 can be used as a universal function generator to generate any logic


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    MC54/74F151 MC54/74F151 F151 PDF

    MC74F195

    Abstract: No abstract text available
    Text: LIFETIME BUY The functional characteristics of the MC74F195 4-Bit Parallel Access Shift Register are indicated in the Logic Diagram and Function Table. The device is useful in a wide variety of shifting, counting, and storage applications. It performs serial, parallel, serial-to-parallel, or parallel-to-serial data transfers at


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    MC74F195 PDF

    74F534

    Abstract: F374 MC54 MC74FXXXDW
    Text: OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS The MC54 / 74F534 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A buffered Clock CP and Output Enable (OE) are


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    74F534 F374 MC54 MC74FXXXDW PDF

    74F538

    Abstract: MC54 MC74FXXXDW
    Text: 1-OF-8 DECODER WITH 3-STATE OUTPUTS The MC54 / 74F538 decoder/demultiplexer accepts three Address A0 – A2 input signals and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active


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    74F538 1-of-32 1-of-16 MC54 MC74FXXXDW PDF

    MC74FXXXDW

    Abstract: 74F245
    Text: 3 MC54/74F245 OCTAL BIDIRECTIONAL TRANSCEIVER WITH 3-STATE INPUTS/OUTPUTS OCTAL BIDIRECTIONAL TRANSCEIVER WITH 3-STATE INPUTS/OUTPUTS The MC54/74F245 contains eight noninverting bidirectional buffers with 3-state outputs and is intended for bus-oriented applications. Current sinking


    Original
    MC54/74F245 MC54/74F245 54/74F MC74FXXXDW 74F245 PDF

    Untitled

    Abstract: No abstract text available
    Text: OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS LIFETIME BUY The MC74F574 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A buffered clock CP and Output Enable (OE) are common to


    Original
    MC74F574 PDF

    Untitled

    Abstract: No abstract text available
    Text: The MC54/74F182 is a high-speed carry lookahead generator. It is generally used with the F181, F381 or 29F01 4-bit arithmetic logic unit to provide high-speed lookahead over word lengths of more than four bits. • Provides Lookahead Carries Across a Group of Four ALUs


    Original
    MC54/74F182 29F01 751B-03 PDF

    Untitled

    Abstract: No abstract text available
    Text: OCTAL REGISTERED TRANSCEIVER, NON-INVERTING, 3-STATE The MC74F543 Octal Registered Transceivers contain two sets of data flowing in either direction. Separate Latch Enable LEAB, LEBA and Enable (OEAB, OEBA) inputs are provided for each register to permit independent


    Original
    MC74F543 74F245 74F373 PDF

    F169

    Abstract: 74F168 8count
    Text: MC54/74F168 MC54/74F169 4-STAGE SYNCHRONOUS BIDIRECTIONAL COUNTERS The MC54/74F168 and MC54/74F169 are fully synchronous 4-stage up/ down counters. The F168 is a BCD decade counter; the F169 is a modulo-16 binary counter. Both feature a preset capability for programmable operation,


    Original
    MC54/74F168 MC54/74F169 MC54/74F168 MC54/74F169 modulo-16 F169 74F168 8count PDF

    dual d flip-flop

    Abstract: t flipflop 74F109
    Text: MOTOROLA DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP The MC54/74F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking_operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D


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    MC54/74F109 dual d flip-flop t flipflop 74F109 PDF

    Untitled

    Abstract: No abstract text available
    Text: M O r O H O L A MC54/74F125 MC54/74F126 3-STATE QUAD BUFFERS • High Impedance NPN Base Inputs for Reduced Loading QUAD BUFFERS, 3-STATE FAST SHOTTKY TTL MC54/74F125 VCC 40 4A 4Y 30 3A 3Y 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 1C 1A 3 4


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    MC54/74F125 MC54/74F126 MC54/74F125 MC54/74F126 51A-02 MC54FXXXJ MC74FXXXN MC74FXXXD PDF

    74F148DC

    Abstract: No abstract text available
    Text: <8> M O T O R O L A MC54/74F148 8-LINE TO 3-LINE PRIORITY ENCODER The MC54/74F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expanded via input and output en­


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    MC54/74F148 74F148DC PDF

    74F245

    Abstract: 74F373 MC74F544 MC74FXXXDW
    Text: M M O T O R O L A MC74F544 OCTAL R E G IST E R E D TRA N SCEIVER, INVERTING, 3-STATE OCTAL REGISTERED TRANSCEIVER, INVERTING, 3-STATE The MC74F544 Octal Registered Transceivers contain two sets of D-Type latches for te mporary storage of data flowing in either direction. Separate


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    MC74F544 74F245 74F373 MC74F544 MC74FXXXDW PDF

    F374

    Abstract: MC74FXXXDW F534 74f534
    Text: M MOTOROLA MC54/74F534 OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS T h e M C 5 4 /7 4 F 5 3 4 is a h ig h -sp e e d , lo w -p o w e r o cta l D -typ e flip -flo p fe a tu rin g se p a ra te D -typ e in p u ts fo r e ach flip -flo p and 3 -sta te o u tp u ts fo r bus


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    MC54/74F534 54/74F F374 MC74FXXXDW F534 74f534 PDF

    t569

    Abstract: No abstract text available
    Text: MOTOROLA 4-BIT BIDIRECTIONAL COUNTERS WITH 3-STATE OUTPUTS T h e M C 5 4 /7 4 F 5 6 8 and M C 5 4 /7 4 F 5 6 9 a re fu lly s yn ch ro n o u s, re versib le c o u n te rs w ith 3 -sta te o utp uts. T h e F568 is a B C D d e ca d e co un ter; th e F569 is a b in a ry coun ter. T h e y fe a tu re p re se t ca p a b ility fo r p ro g ra m m a b le o p e ra ­


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