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    MAX9215 Search Results

    MAX9215 Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    MAX9215 Maxim Integrated Products Programmable DC-Balance 21-Bit Serializers Original PDF
    MAX9215ETM Maxim Integrated Products Programmable DC-Balanced 21-Bit Serializers Original PDF
    MAX9215EUM Maxim Integrated Products Programmable DC-Balanced 21-Bit Serializers Original PDF

    MAX9215 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    MAX9220EUM

    Abstract: No abstract text available
    Text: 19-2864; Rev 1; 10/03 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 feature programmable DC balance, which allows isolation between a serializer and deserializer using AC-coupling. A deserializer decodes data transmitted by a MAX9209/MAX9211/MAX9213/MAX9215


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    21-Bit MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 MAX9209/MAX9211/MAX9213/MAX9215 MAX9210/MAX9212/MAX9214/MAX9216 DS90CR216A DS90CR218A. MAX9220/MAX9222 non-DC-balanMAX9220/MAX9222 MAX9220EUM PDF

    DS90CR215

    Abstract: DS90CR217 MAX9209 MAX9209ETM MAX9209EUM MAX9210 MAX9211 MAX9213ETM
    Text: 19-2828; Rev 2; 2/04 Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9211/MAX9213/MAX9215 serialize 21 bits of LVTTL/LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization.


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    21-Bit MAX9209/MAX9211/MAX9213/MAX9215 MAX9210/ MAX9212/MAX9214/MAX9216 DS90CR215 DS90CR217 MAX9209 MAX9209ETM MAX9209EUM MAX9210 MAX9211 MAX9213ETM PDF

    DS90CR215

    Abstract: DS90CR217 MAX9209 MAX9210 MAX9211 MAX9213 MAX9215 marking aaa MAX9213ETM
    Text: 19-2828; Rev 3; 6/07 Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9211/MAX9213/MAX9215 serialize 21 bits of LVTTL/LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization.


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    21-Bit MAX9209/MAX9211/MAX9213/MAX9215 MAX9210/ MAX9212/MAX9214/MAX9216 DS90CR215 DS90CR217 MAX9209 MAX9210 MAX9211 MAX9213 MAX9215 marking aaa MAX9213ETM PDF

    MAX9213ETM

    Abstract: No abstract text available
    Text: 19-2828; Rev 3; 6/07 Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9211/MAX9213/MAX9215 serialize 21 bits of LVTTL/LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization.


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    21-Bit MAX9209/MAX9211/MAX9213/MAX9215 MAX9210/ MAX9212/MAX9214/MAX9216 MAX9213EUM MAX9213EUM+ MAX9213ETM PDF

    EPS17

    Abstract: MAX9220EUM
    Text: 19-2864; Rev 1; 10/03 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 feature programmable DC balance, which allows isolation between a serializer and deserializer using AC-coupling. A deserializer decodes data transmitted by a MAX9209/MAX9211/MAX9213/MAX9215


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    21-Bit MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 MAX9209/MAX9211/MAX9213/MAX9215 MAX9210/MAX9212/MAX9214/MAX9216 T4877-1 EPS17 MAX9220EUM PDF

    MAX9213ETM

    Abstract: No abstract text available
    Text: 19-2828; Rev 3; 6/07 Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9211/MAX9213/MAX9215 serialize 21 bits of LVTTL/LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization.


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    21-Bit MAX9209/MAX9211/MAX9213/MAX9215 MAX9210/ MAX9212/MAX9214/MAX9216 MAX9209EUM MAX9209EUM+ MAX9213ETM PDF

    DS90CR216A

    Abstract: DS90CR218A MAX9210 MAX9222 MAX9220EUM
    Text: 19-2864; Rev 1; 8/03 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 feature programmable DC balance, which allows isolation between a serializer and deserializer using AC-coupling. A deserializer decodes data transmitted by a MAX9209/MAX9211/MAX9213/MAX9215


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    21-Bit MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 MAX9209/MAX9211/MAX9213/MAX9215 MAX9210/MAX9212/MAX9214/MAX9216 DS90CR216A DS90CR218A. MAX9220/MAX9222 0/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222 DS90CR218A MAX9210 MAX9220EUM PDF

    MAX9213ETM

    Abstract: No abstract text available
    Text: 19-2828; Rev 1; 7/03 Programmable DC-Balanced 21-Bit Serializers Features ♦ Programmable DC-Balanced or Non-DC-Balanced Operation ♦ DC Balance Allows AC-Coupling for Ground-Shift Tolerance ♦ As Low as 8MHz Operation Two frequency ranges and two DC-balance default


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    21-Bit MAX9209/MAX9211/MAX9213/MAX9215 MAX9210/ MAX9212/MAX9214/MAX9216 T4877-1 MAX9213ETM PDF

    Untitled

    Abstract: No abstract text available
    Text: 19-2864; Rev 4; 3/05 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels.


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    21-Bit MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 MAX9209/MAX9211/MAX9213/ MAX9215 MAX9210/MAX9212/MAX9214/MAX9216 D222EUM MAX9220EUM PDF

    DS90CR216A

    Abstract: DS90CR218A MAX9210 MAX9215 MAX9222
    Text: 19-2864; Rev 4; 3/05 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels.


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    21-Bit MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 MAX9209/MAX9211/MAX9213/ MAX9215 MAX9210/MAX9212/MAX9214/MAX9216 DS90CR216A DS90CR218A MAX9210 PDF

    Untitled

    Abstract: No abstract text available
    Text: 19-3641; Rev 1; 10/07 Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for


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    21-Bit, MAX9234/MAX9236/MAX9238 MAX9209/MAX9211/ MAX9213/MAX9215 MAX9234 MAX9234/MAX9236/MAX9238 PDF

    UTP cat 6 cable

    Abstract: No abstract text available
    Text: 19-2828; Rev 5; 3/12 KIT ATION EVALU E L B A IL AVA Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9213 serialize 21 bits of LVTTL/ LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides


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    21-Bit DS90CR215 DS90CR217 785Gbps TIA/EIA-644 48-Lead 3AX9215. UTP cat 6 cable PDF

    max9234

    Abstract: MAX9234EUM MAX9236EUM MAX9238
    Text: 19-3641; Rev 0; 4/05 Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for


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    21-Bit, MAX9234/MAX9236/MAX9238 MAX9209/MAX9211/ MAX9213/MAX9215 MAX9234 MAX92BY MAX9234EUM MAX9236EUM MAX9238 PDF

    max14574

    Abstract: MAX1786 MAX1788 MAX8899 DS1849 MAX16908 MAX4967 DS3610 max17018 max13487
    Text: Monitor Reports by Product: 1. Find the product of interest in the table below. Note the process and/or package for that product. 2. Use the "Back" button to return to the home page. 3. Select the process in the "Process Reliability" for the product of interest.


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    PDF

    Untitled

    Abstract: No abstract text available
    Text: MAX9234/MAX9236/ MAX9238 Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers General Description The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for


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    MAX9234/MAX9236/ MAX9238 21-Bit, MAX9234/MAX9236/MAX9238 MAX9209/MAX9211/ MAX9213/MAX9215 MAX9234 PDF

    DS90CR215

    Abstract: DS90CR217 MAX9209 MAX9209ETM MAX9209EUM MAX9209GUM MAX9213 marking aaa MAX9213ETM
    Text: 19-2828; Rev 4; 10/07 KIT ATION EVALU E L B AVAILA Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9213 serialize 21 bits of LVTTL/ LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides


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    21-Bit MAX9209/MAX9213 MAX9210/MAX9214 21-bit MAX9211 MAX9215. MAX9209/MAX9213 DS90CR215 DS90CR217 MAX9209 MAX9209ETM MAX9209EUM MAX9209GUM MAX9213 marking aaa MAX9213ETM PDF

    Untitled

    Abstract: No abstract text available
    Text: 19-2828; Rev 5; 3/12 KIT ATION EVALU E L B A IL AVA Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9213 serialize 21 bits of LVTTL/ LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides


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    21-Bit MAX9209/MAX9213 MAX9210/MAX9214 21-bit PDF

    Untitled

    Abstract: No abstract text available
    Text: 19-3641; Rev 0; 4/05 Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for


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    21-Bit, MAX9234/MAX9236/MAX9238 MAX9209/MAX9211/ MAX9213/MAX9215 MAX9234 MAX9234EUM-D 21-0155C U48-1* PDF

    MAX9220EUM

    Abstract: No abstract text available
    Text: 19-2864; Rev 4; 3/05 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels.


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    21-Bit MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 MAX9209/MAX9211/MAX9213/ MAX9215 MAX9210/MAX9212/MAX9214/MAX9216 21-0155C MAX9222EUM MAX9220EUM PDF

    Untitled

    Abstract: No abstract text available
    Text: MAX9234/MAX9236/ MAX9238 Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers General Description The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for


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    MAX9234/MAX9236/ MAX9238 21-Bit, MAX9234/MAX9236/MAX9238 MAX9209/MAX9211/ MAX9213/MAX9215 MAX9234 PDF

    DS90CR216A

    Abstract: DS90CR218A MAX9210ETM MAX9210EUM MAX9212ETM
    Text: 19-2864; Rev 0; 4/03 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216 feature programmable DC balance, which allows isolation between serializer and deserializer using AC-coupling. A deserializer decodes data transmitted by a


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    21-Bit MAX9210/MAX9212/MAX9214/MAX9216 MAX9209/MAX9211/MAX9213/MAX9215 DS90CR216A DS90CR218A. MAX9210/MAX9212) MAX9210/MAX9212/MAX9214/MAX9216 DS90CR218A MAX9210ETM MAX9210EUM MAX9212ETM PDF

    Untitled

    Abstract: No abstract text available
    Text: 19-3641; Rev 0; 4/05 Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for


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    21-Bit, MAX9234/MAX9236/MAX9238 MAX9209/MAX9211/ MAX9213/MAX9215 MAX9234 MAX9238EUM MAX9238EUM+ MAX9238EUM MAX9238EUM-T PDF

    max9234eum

    Abstract: MAX9234 MAX9236EUM MAX9238 marking aaa
    Text: 19-3641; Rev 1; 10/07 Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for


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    21-Bit, MAX9234/MAX9236/MAX9238 MAX9209/MAX9211/ MAX9213/MAX9215 MAX9234 MAX9234/MAX9236/MAX9238 max9234eum MAX9236EUM MAX9238 marking aaa PDF

    MAX9210

    Abstract: MAX9215 MAX9222 DS90CR216A DS90CR218A MAX9220EUM
    Text: 19-2864; Rev 3; 4/04 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels.


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    21-Bit MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 MAX9209/MAX9211/MAX9213/ MAX9215 MAX9210/MAX9212/MAX9214/MAX9216 MAX9210 DS90CR216A DS90CR218A MAX9220EUM PDF