ADV9502
Abstract: ep320Ipc TNPLD610 N85C220 D5AC312 EP320IDC npld610 EP320IPI EPX780LC84 N5C180
Text: April 4, 1995 Dear Customer: Effective July 1, 1995, Altera will transition from a dual mark, to a single mark for all products acquired from Intel. In addition, Altera will be converting solely to Altera ordering codes for these products See Table 1 . This change is cosmetic in nature and does not effect
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EP320IPI
EP22V10LC
EP22V10PC
EP22V10ELC
EP22V10EPC
EP312DC
EP312LC
EP312PC
EP600IDC
EP600ILC
ADV9502
ep320Ipc
TNPLD610
N85C220
D5AC312
EP320IDC
npld610
EP320IPI
EPX780LC84
N5C180
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marking TP5C
Abstract: TP5C TP2520 TP2520N8 TP2522 TP2522N8 TP2522ND
Text: TP2520 TP2522 Low Threshold P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information RDS ON (max) VGS(th) (max) ID(ON) (min) TO-243AA* Die† -200V 12Ω -2.4V -0.75A TP2520N8 — -220V 12Ω -2.4V -0.75A TP2522N8 TP2522ND * Same as SOT-89. †
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TP2520
TP2522
O-243AA*
-200V
TP2520N8
-220V
TP2522N8
TP2522ND
OT-89.
O-243AA
marking TP5C
TP5C
TP2520
TP2520N8
TP2522
TP2522N8
TP2522ND
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Untitled
Abstract: No abstract text available
Text: TP2522 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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TP2522
125pF
200pF
TP2522
O-243AA
OT-89)
O-243,
DSFP-TP2522
B122707
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A10150
Abstract: TO243AA TP2522 TP2522N8-G TP2522ND A101507
Text: TP2522 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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TP2522
125pF
O-243AA
OT-89)
O-243,
A101507
A10150
TO243AA
TP2522
TP2522N8-G
TP2522ND
A101507
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TO-243AA
Abstract: TN2520N8-G TP2520 tp5cw jedec package TO-243AA
Text: TP2520 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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TP2520
125pF
O-243AA
OT-89)
O-243,
A101507
TO-243AA
TN2520N8-G
TP2520
tp5cw
jedec package TO-243AA
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Untitled
Abstract: No abstract text available
Text: TP2520 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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Original
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PDF
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TP2520
125pF
200pF
TP2520
O-243AA
OT-89)
O-243,
B122707
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TP2520N8-G
Abstract: No abstract text available
Text: TP2520 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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PDF
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TP2520
125pF
200pF
TP2520
O-243AA
OT-89)
O-243,
B122707
TP2520N8-G
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TP2520
Abstract: TP2520N8 TP2522 TP2522N8 TP2522ND voltage drop circuit from 220V to 10V marking TP5C
Text: TP2520 TP2522 Low Threshold P-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information RDS ON (max) VGS(th) (max) ID(ON) (min) TO-243AA* Die† -200V 12Ω -2.4V -0.75A TP2520N8 — -220V 12Ω -2.4V -0.75A TP2522N8 TP2522ND * Same as SOT-89. †
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TP2520
TP2522
O-243AA*
-200V
TP2520N8
-220V
TP2522N8
TP2522ND
OT-89.
O-243AA
TP2520
TP2520N8
TP2522
TP2522N8
TP2522ND
voltage drop circuit from 220V to 10V
marking TP5C
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Untitled
Abstract: No abstract text available
Text: TP2522 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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TP2522
125pF
DSFP-TP2522
B091408
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TP2522ND
Abstract: TP2522 TP2522N8-G
Text: TP2522 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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TP2522
125pF
DSFP-TP2522
B022309
TP2522ND
TP2522
TP2522N8-G
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Untitled
Abstract: No abstract text available
Text: Supertex inc. TP2522 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description ►► Low threshold -2.4V max. ►► High input impedance ►► Low input capacitance (125pF max.) ►► Fast switching speeds ►► Low on-resistance ►► Free from secondary breakdown
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TP2522
125pF
DSFP-TP2522
C081413
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b0914
Abstract: No abstract text available
Text: TP2520 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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PDF
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TP2520
125pF
B091408
b0914
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Untitled
Abstract: No abstract text available
Text: TP2520 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling
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PDF
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TP2520
125pF
B022309
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TP2520
Abstract: tp5cw TP5C
Text: TP2520 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This
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Original
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PDF
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TP2520
125pF
B022309
TP2520
tp5cw
TP5C
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Untitled
Abstract: No abstract text available
Text: Supertex inc. TP2520 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description ►► Low threshold -2.4V max. ►► High input impedance ►► Low input capacitance (125pF max.) ►► Fast switching speeds ►► Low on-resistance ►► Free from secondary breakdown
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TP2520
125pF
C081413
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