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    MARKING NXP TSSOP8 PACKAGE Search Results

    MARKING NXP TSSOP8 PACKAGE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TPH9R00CQH Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 150 V, 64 A, 0.009 Ohm@10V, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPH2R408QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 120 A, 0.00243 Ohm@10V, SOP Advance Visit Toshiba Electronic Devices & Storage Corporation
    XPH2R106NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 110 A, 0.0021 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    XPH3R206NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 70 A, 0.0032 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    TPH4R008QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 86 A, 0.004 Ohm@10V, SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation

    MARKING NXP TSSOP8 PACKAGE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    5V06U

    Abstract: No abstract text available
    Text: PESD5V0L6UAS; PESD5V0L6US Low capacitance 6-fold ESD protection diode arrays Rev. 03 — 18 August 2009 Product data sheet 1. Product profile 1.1 General description Low capacitance 6-fold ESD protection diode arrays in small plastic packages designed to protect up to six transmission or data lines from the damage caused by ElectroStatic


    Original     		PDF OT505-1 OT96-1 5V06U

    NXP G2XM EPC

    Abstract: G2XM NXP EPC UCODE G2X NXP UCODE G2XM J122 transistor SOT1040AB2 SL3S1002FTT sot1122 SL3S1202FTB1 SOT-1122
    Text: SL3ICS1002/1202 UCODE G2XM and G2XL Rev. 3.5 — 2 November 2009 157335 Product short data sheet CONFIDENTIAL 1. General description The UHF EPCglobal Generation 2 standard allows the commercialized provision of mass adoption of UHF RFID technology for passive smart tags and labels. Main fields of


    Original     		PDF SL3ICS1002/1202 NXP G2XM EPC G2XM NXP EPC UCODE G2X NXP UCODE G2XM J122 transistor SOT1040AB2 SL3S1002FTT sot1122 SL3S1202FTB1 SOT-1122

    Untitled

    Abstract: No abstract text available
    Text: PESD5V0L7BAS; PESD5V0L7BS Low capacitance 7-fold bidirectional ESD protection diode arrays Rev. 4 — 23 June 2010 Product data sheet 1. Product profile 1.1 General description Low capacitance 7-fold bidirectional ESD protection diode arrays in small plastic


    Original     		PDF OT505-1 OT96-1

    5V07B

    Abstract: No abstract text available
    Text: PESD5V0L7BAS; PESD5V0L7BS Low capacitance 7-fold bidirectional ESD protection diode arrays Rev. 4 — 23 June 2010 Product data sheet 1. Product profile 1.1 General description Low capacitance 7-fold bidirectional ESD protection diode arrays in small plastic


    Original     		PDF OT505-1 OT96-1 5V07B

    74HC126

    Abstract: 74HC2G126 74HC2G126DC 74HC2G126DP 74HCT126 74HCT2G126 74HCT2G126DC 74HCT2G126DP
    Text: 74HC2G126; 74HCT2G126 Dual buffer/line driver; 3-state Rev. 04 — 24 September 2009 Product data sheet 1. General description The 74HC2G126; 74HCT2G126 is a high-speed Si-gate CMOS device. The 74HC2G126; 74HCT2G126 provides two non-inverting buffer/line drivers with 3-state


    Original     		PDF 74HC2G126; 74HCT2G126 74HCT2G126 74HC126 74HCT126. JESD22-A114F HCT2G126 74HC2G126 74HC2G126DC 74HC2G126DP 74HCT126 74HCT2G126DC 74HCT2G126DP

    PESD5V0L7BAS

    Abstract: marking nxp TSSOP8 package
    Text: PESD5V0L7BAS; PESD5V0L7BS Low capacitance 7-fold bidirectional ESD protection diode arrays Rev. 03 — 20 August 2009 Product data sheet 1. Product profile 1.1 General description Low capacitance 7-fold bidirectional ESD protection diode arrays in small plastic


    Original     		PDF OT505-1 OT96-1 PESD5V0L7BAS marking nxp TSSOP8 package

    VSSOP8

    Abstract: JESD22-A114E MO-187
    Text: XC7WH14 Inverting Schmitt trigger Rev. 01 — 7 September 2009 Product data sheet 1. General description The XC7WH14 is a high-speed Si-gate CMOS device. This device provides an inverting buffer function with Schmitt trigger action. This device is capable of transforming slowly


    Original     		PDF XC7WH14 XC7WH14 JESD22-A114E JESD22-A115-A JESD22-C101C VSSOP8 MO-187

    VSSOP8

    Abstract: 74LVC2G32 74LVC2G32DC 74LVC2G32DP 74LVC2G32GM 74LVC2G32GT MO-187
    Text: 74LVC2G32 Dual 2-input OR gate Rev. 05 — 4 September 2007 Product data sheet 1. General description The 74LVC2G32 provides a 2-input OR gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G32 74LVC2G32 VSSOP8 74LVC2G32DC 74LVC2G32DP 74LVC2G32GM 74LVC2G32GT MO-187

    74LVC2G32

    Abstract: 74LVC2G32DC 74LVC2G32DP 74LVC2G32GM 74LVC2G32GT MO-187 VSSOP8
    Text: 74LVC2G32 Dual 2-input OR gate Rev. 06 — 27 February 2008 Product data sheet 1. General description The 74LVC2G32 provides a 2-input OR gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G32 74LVC2G32 74LVC2G32DC 74LVC2G32DP 74LVC2G32GM 74LVC2G32GT MO-187 VSSOP8

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G08 Dual 2-input AND gate Rev. 07 — 3 March 2008 Product data sheet 1. General description The 74LVC2G08 provides a 2-input AND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC2G08 as a translator in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G08 74LVC2G08

    JESD22-A114E

    Abstract: MO-187 XC7WH126
    Text: XC7WH126 Dual buffer/line driver; 3-state Rev. 01 — 2 September 2009 Product data sheet 1. General description The XC7WH126 is a high-speed Si-gate CMOS device. This device provides a dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the


    Original     		PDF XC7WH126 XC7WH126 JESD22-A114E: JESD22-A115-A: JESD22-C101C: JESD22-A114E MO-187

    74AHC2G08

    Abstract: 74AHC2G08DC 74AHC2G08DP 74AHCT2G08 74AHCT2G08DC 74AHCT2G08DP JESD22-A114E
    Text: 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate Rev. 03 — 12 January 2009 Product data sheet 1. General description The 74AHC2G08; 74AHCT2G08 is a high-speed Si-gate CMOS device. The 74AHC2G08; 74AHCT2G08 provides two 2-input AND gates. 2. Features • Symmetrical output impedance


    Original     		PDF 74AHC2G08; 74AHCT2G08 74AHCT2G08 JESD22-A114E JESD22-A115-A JESD22-C101C 74AHC2G08DP 74AHC2G08 74AHC2G08DC 74AHC2G08DP 74AHCT2G08DC 74AHCT2G08DP

    hct nxp

    Abstract: 74HCT2G86DC 74HCT2G86DP JESD22-A114E 74HC2G86 74HC2G86DC 74HC2G86DP 74HCT2G86
    Text: 74HC2G86; 74HCT2G86 Dual 2-input exclusive-OR gate Rev. 03 — 7 May 2009 Product data sheet 1. General description The 74HC2G86 and 74HCT2G86 are high-speed Si-gate CMOS devices. They provide two 2-input exclusive-OR gates. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.


    Original     		PDF 74HC2G86; 74HCT2G86 74HC2G86 74HCT2G86 JESD22-A114E JESD22-A115-A HCT2G86 hct nxp 74HCT2G86DC 74HCT2G86DP 74HC2G86DC 74HC2G86DP

    74HC3G04DP

    Abstract: 74HC3G04 74HC3G04DC 74HC3G04GD 74HCT3G04 74HCT3G04DC 74HCT3G04DP 74HCT3G04GD JESD22-A114E
    Text: 74HC3G04; 74HCT3G04 Inverter Rev. 03 — 2 July 2008 Product data sheet 1. General description The 74HC3G04 and 74HCT3G04 are high-speed Si-gate CMOS devices. They provide three inverting buffers. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.


    Original     		PDF 74HC3G04; 74HCT3G04 74HC3G04 74HCT3G04 JESD22-A114E JESD22-A115-A HCT3G04 74HC3G04DP 74HC3G04DC 74HC3G04GD 74HCT3G04DC 74HCT3G04DP 74HCT3G04GD

    74AHC3G04

    Abstract: 74AHC3G04DC 74AHC3G04DP 74AHCT3G04 74AHCT3G04DC 74AHCT3G04DP JESD22-A114E
    Text: 74AHC3G04; 74AHCT3G04 Inverter Rev. 02 — 26 January 2009 Product data sheet 1. General description The 74AHC3G04; 74AHCT3G04 is a high-speed Si-gate CMOS device. The 74AHC3G04; 74AHCT3G04 provides three inverting buffers. 2. Features • Symmetrical output impedance


    Original     		PDF 74AHC3G04; 74AHCT3G04 74AHCT3G04 JESD22-A114E JESD22-A115-A JESD22-C101C 74AHC3G04DP 74AHC3G04 74AHC3G04DC 74AHC3G04DP 74AHCT3G04DC 74AHCT3G04DP

    74HC2G02

    Abstract: 74HC2G02DC 74HC2G02DP 74HCT2G02 74HCT2G02DC 74HCT2G02DP JESD22-A114E
    Text: 74HC2G02; 74HCT2G02 Dual 2-input NOR gate Rev. 04 — 11 May 2009 Product data sheet 1. General description The 74HC2G02 and 74HCT2G02 are high-speed Si-gate CMOS devices. They provide two 2-input NOR gates. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.


    Original     		PDF 74HC2G02; 74HCT2G02 74HC2G02 74HCT2G02 JESD22-A114E JESD22-A115-A HCT2G02 74HC2G02DC 74HC2G02DP 74HCT2G02DC 74HCT2G02DP

    diode marking u34

    Abstract: marking code u34 VSSOP8 74HC3G34 74HC3G34DC 74HC3G34DP 74HCT3G34 74HCT3G34DC 74HCT3G34DP JESD22-A114E
    Text: 74HC3G34; 74HCT3G34 Triple buffer gate Rev. 05 — 7 May 2009 Product data sheet 1. General description The 74HC3G34; 74HCT3G34 are high-speed Si-gate CMOS devices. They provide three buffer gates. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.


    Original     		PDF 74HC3G34; 74HCT3G34 74HCT3G34 JESD22-A114E JESD22-A115-A HCT3G34 diode marking u34 marking code u34 VSSOP8 74HC3G34 74HC3G34DC 74HC3G34DP 74HCT3G34DC 74HCT3G34DP

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G02 Dual 2-input NOR gate Rev. 06 — 22 February 2008 Product data sheet 1. General description The 74LVC2G02 provides a 2-input NOR gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G02 74LVC2G02

    74LVC2G08

    Abstract: 74LVC2G08DC 74LVC2G08DP 74LVC2G08GM 74LVC2G08GT MO-187 VSSOP8
    Text: 74LVC2G08 Dual 2-input AND gate Rev. 06 — 4 September 2007 Product data sheet 1. General description The 74LVC2G08 provides a 2-input AND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G08 74LVC2G08 74LVC2G08DC 74LVC2G08DP 74LVC2G08GM 74LVC2G08GT MO-187 VSSOP8

    74LVC2G00

    Abstract: 74LVC2G00DC 74LVC2G00DP 74LVC2G00GM 74LVC2G00GT MO-187
    Text: 74LVC2G00 Dual 2-input NAND gate Rev. 05 — 4 September 2007 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G00 74LVC2G00 74LVC2G00DC 74LVC2G00DP 74LVC2G00GM 74LVC2G00GT MO-187

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G00 Dual 2-input NAND gate Rev. 06 — 20 February 2008 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G00 74LVC2G00

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G38 Dual 2-input NAND gate; open drain Rev. 06 — 19 February 2008 Product data sheet 1. General description The 74LVC2G38 provides a 2-input NAND function. The outputs of the 74LVC2G38 devices are open-drain and can be connected to other open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND


    Original     		PDF 74LVC2G38 74LVC2G38

    74HCT2G125DP

    Abstract: 74HC125 74HC2G125 74HC2G125DC 74HC2G125DP 74HCT125 74HCT2G125 74HCT2G125DC JESD22-A114E VSSOP8
    Text: 74HC2G125; 74HCT2G125 Dual buffer/line driver; 3-state Rev. 04 — 4 July 2008 Product data sheet 1. General description The 74HC2G125; 74HCT2G125 is a high-speed, Si-gate CMOS device. The 74HC2G125; 74HCT2G125 provides two non-inverting buffer/line drivers with 3-state


    Original     		PDF 74HC2G125; 74HCT2G125 74HCT2G125 74HC125 74HCT125. JESD22-A114E HCT2G125 74HCT2G125DP 74HC2G125 74HC2G125DC 74HC2G125DP 74HCT125 74HCT2G125DC VSSOP8

    SOT996-2

    Abstract: 74AHC2G00 74AHC2G00DC 74AHC2G00DP 74AHCT2G00 74AHCT2G00DC 74AHCT2G00DP JESD22-A114E
    Text: 74AHC2G00; 74AHCT2G00 Dual 2-input NAND gate Rev. 02 — 12 January 2009 Product data sheet 1. General description The 74AHC2G00; 74AHCT2G00 is a high-speed Si-gate CMOS device. The 74AHC2G00; 74AHCT2G00 provides two 2-input NAND gates. 2. Features • Symmetrical output impedance


    Original     		PDF 74AHC2G00; 74AHCT2G00 74AHCT2G00 JESD22-A114E JESD22-A115-A JESD22-C101C 74AHC2G00DP SOT996-2 74AHC2G00 74AHC2G00DC 74AHC2G00DP 74AHCT2G00DC 74AHCT2G00DP