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    M74HC10 Price and Stock

    Rochester Electronics LLC MM74HC10MX

    IC GATE NAND 3CH 3-INP
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    DigiKey MM74HC10MX Bulk 2,500 1,567
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    Rochester Electronics LLC MM74HC10N

    IC GATE NAND 3CH 3-INP
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    DigiKey MM74HC10N Bulk 2,259 987
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    STMicroelectronics M74HC10B1R

    IC GATE NAND 3CH 3-INP 14DIP
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    DigiKey M74HC10B1R Tube 7 1
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    Newark M74HC10B1R Bulk 2,800
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    Quest Components M74HC10B1R 75
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    Component Electronics, Inc M74HC10B1R 200
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    STMicroelectronics M74HC109B1R

    IC FF JK TYPE DUAL 1BIT 16DIP
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    DigiKey M74HC109B1R Tube 5,000
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    Quest Components M74HC109B1R 23
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    STMicroelectronics M74HC109M1R

    IC FF JK TYPE DUAL 1BIT 16SOP
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    DigiKey M74HC109M1R Tube 50,000
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    Find more M74HC10 price and stock on Findchips.com

    M74HC10 Datasheets (61)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    M74HC10 STMicroelectronics Triple 3-Input NAND Gate Original PDF
    M74HC107 STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Original PDF
    M74HC107B1 SGS-Thomson DUAL J-K FLIP-FLOP Scan PDF
    M74HC107B1N STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Scan PDF
    M74HC107B1R STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Original PDF
    M74HC107B1R STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Original PDF
    M74HC107B1R STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Original PDF
    M74HC107C1 SGS-Thomson DUAL J-K FLIP-FLOP Scan PDF
    M74HC107C1 STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Scan PDF
    M74HC107C1R STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Original PDF
    M74HC107F1 SGS-Thomson DUAL J-K FLIP-FLOP Scan PDF
    M74HC107F1 STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Scan PDF
    M74HC107M1 STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Scan PDF
    M74HC107M1R STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Original PDF
    M74HC107M1R STMicroelectronics Dual J-K Flip Flop with Clear Original PDF
    M74HC107P Mitsubishi Dual J-K Flip-Flop with Reset Original PDF
    M74HC107RM13TR STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Original PDF
    M74HC107RM13TR STMicroelectronics Dual J-K Flip Flop with Clear Original PDF
    M74HC107TTR STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Original PDF
    M74HC107TTR STMicroelectronics DUAL J-K FLIP FLOP WITH CLEAR Original PDF

    M74HC10 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    M74HC107

    Abstract: M74HC107B1R M74HC107M1R M74HC107RM13TR M74HC107TTR TSSOP14
    Text: M74HC107 DUAL J-K FLIP FLOP WITH CLEAR • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 80MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)


    Original     		PDF M74HC107 80MHz M74HC107 M74HC107B1R M74HC107M1R M74HC107RM13TR M74HC107TTR TSSOP14

    74HC10

    Abstract: M54HC10 M54HC10F1R M74HC10 M74HC10B1R M74HC10C1R M74HC10M1R 74HC10 equivalent
    Text: M54HC10 M74HC10 TRIPLE 3-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 6 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HC10 M74HC10 54/74LS10 M54HC10F1R M74HC10M1R M74HC10B1R M74HC10C1R M54/74HC10 74HC10 M54HC10 M54HC10F1R M74HC10 M74HC10B1R M74HC10C1R M74HC10M1R 74HC10 equivalent

    M54HC10

    Abstract: M54HC10F1R M74HC10 M74HC10B1R M74HC10C1R M74HC10M1R 74hc10
    Text: M54HC10 M74HC10 TRIPLE 3-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 6 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HC10 M74HC10 54/74LS10 M54HC10F1R M74HC10M1R M74HC10B1R M74HC10C1R M54/74HC10 M54HC10 M54HC10F1R M74HC10 M74HC10B1R M74HC10C1R M74HC10M1R 74hc10

    M74HC10

    Abstract: M74HC10B1R M74HC10M1R M74HC10RM13TR M74HC10TTR TSSOP14
    Text: M74HC10 TRIPLE 3-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 8ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)


    Original     		PDF M74HC10 M74HC10 M74HC1ts M74HC10B1R M74HC10M1R M74HC10RM13TR M74HC10TTR TSSOP14

    74LS107

    Abstract: M54HC107 M54HC107F1R M74HC107 M74HC107B1R M74HC107C1R M74HC107M1R jk flip flop cmos
    Text: M54HC107 M74HC107 DUAL J-K FLIP FLOP WITH CLEAR . . . . . . . . HIGH SPEED fMAX = 75 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HC107 M74HC107 54/74LS107 M54HC107F1R M74HC107M1R M74HC107B1R M74HC107C1R M54/74HC107 74LS107 M54HC107 M54HC107F1R M74HC107 M74HC107B1R M74HC107C1R M74HC107M1R jk flip flop cmos

    Untitled

    Abstract: No abstract text available
    Text: M74HC10 TRIPLE 3-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 8ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)


    Original     		PDF M74HC10 M74HC10

    M74HC10

    Abstract: M74HC10B1R M74HC10M1R M74HC10RM13TR M74HC10TTR TSSOP14
    Text: M74HC10 TRIPLE 3-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 8ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)


    Original     		PDF M74HC10 M74HC10 M74HC1ent M74HC10B1R M74HC10M1R M74HC10RM13TR M74HC10TTR TSSOP14

    Untitled

    Abstract: No abstract text available
    Text: M74HC10 TRIPLE 3-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 8ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)


    Original     		PDF M74HC10 M74HC10

    M74HC109

    Abstract: M74HC109B1R M74HC109M1R M74HC109RM13TR M74HC109TTR PO13H TSSOP16
    Text: M74HC109 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 67MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF M74HC109 67MHz M74HC109 M74HC109B1R M74HC109M1R M74HC109RM13TR M74HC109TTR PO13H TSSOP16

    M74HC109

    Abstract: M74HC109B1R M54HC109 M54HC109F1R M74HC109C1R M74HC109M1R
    Text: M54HC109 M74HC109 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR . . . . . . . . HIGH SPEED fMAX = 63 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS


    Original     		PDF M54HC109 M74HC109 54/74LS109 M54HC109F1R M74HC109M1R M74HC109B1R M74HC109C1R M54/74HC109 M74HC109 M74HC109B1R M54HC109 M54HC109F1R M74HC109C1R M74HC109M1R

    M74HC109

    Abstract: No abstract text available
    Text: M74HC109 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 67MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF M74HC109 67MHz M74HC109

    Untitled

    Abstract: No abstract text available
    Text: S G S -T H O M S O N iD œ a iÊ T IM D Ê I M54HC10 M74HC10 TRIPLE 3-INPUT NAND GATE • HIGHSPEED tpD = 6 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 1 HA (MAX.) AT TA = 25 "C ■ HIGH NOISE IMMUNITY V nih = V nil = 28 % Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY


    OCR Scan     		PDF M54HC10 M74HC10 54/74LS10 M54HC10F1R M74HC10M1R M74HC10B1R M74HC10C1R 0DS43b3

    74HC10

    Abstract: No abstract text available
    Text: Æ 7 S G S -T H O M S O N M54HC1 o *7# UO MilL[i ÏÏGMO(gS M74HC10 TRIPLE 3-INPUT NAND GATE • HIGH SPEED tpD = 8 ns (TYP. at Vc c = 5V ■ LOW POWER DISSIPATION Ice = 1 (MAX.) at T a = 25°C ■ HIGH NOISE IMMUNITY V n IH = V n IL= 28% Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY


    OCR Scan     		PDF M74HC10 M54HC1 M54HC10 M74HC10 54/74LS10 M54/74HC10 Tto125 74HC10

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI HIGH SPEED CMOS M74HC10P M74HC10DP T R IP L E 3 -IN P U T P O S IT IV E NAND GATE DESCRIPTION The M 74H C 10 is a sem iconductor integrated c ircu it con­ sisting of three 3-in put p o s itiv e -lo g ic NAND, PIN CONFIGURATION TOP VIEW usable as


    OCR Scan     		PDF M74HC10P M74HC10DP

    pin configuration 74LS10

    Abstract: M74HC10P 4000B 74LS10 M74HC10 M74HC10DP of IC 74ls10 CMOS 74LS10 logic diagram of IC 74ls10 74LS10 mitsubishi
    Text: M IT S U B IS H I HIGH S P E E D C M O S M74HC10P M74HC10DP T R IP L E 3 -IN P U T P O S IT IV E NAND G A TE DESCRIPTION The M 74H C 10 is a sem iconductor integrated circu it con­ sisting of three 3-input p o sitive-lo gic PIN CONFIGURATION TOP VIEW NAND, usable as


    OCR Scan     		PDF M74HC10P M74HC10DP M74HC10 pin configuration 74LS10 4000B 74LS10 M74HC10DP of IC 74ls10 CMOS 74LS10 logic diagram of IC 74ls10 74LS10 mitsubishi

    Untitled

    Abstract: No abstract text available
    Text: SbE D • OOBTTSB b?T ■ SGTH S C S -T H O M S O N M54HC10 M74HC10 G S-THOnSON T - ¥ 3 -Zl TRIPLE 3-INPUT NAND GATE ■ HIGH SPEED tpD = 8 ns TYP. at VCc = 5V ■ LOW POWER DISSIPATION Ice = 1 n * (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY V n IH = V n i L= 28% Vc c (MIN.)


    OCR Scan     		PDF M54HC10 M74HC10 54/74LS10 M54HC10 M74HC10

    74HC10

    Abstract: 74LS10 truth table
    Text: r z 7 S G S -T H O M S O N Ä 7# M 54H C 10 M74HC10 TRIPLE 3-INPUT NAND GATE • HIGHSPEED tPD = 6 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 1 HA (MAX.) AT Ta = 25 "C ■ HIGH NOISE IMMUNITY V nih = V nil = 28 % Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY


    OCR Scan     		PDF M74HC10 54/74LS10 M54HC10F1 M74HC10M1R M74HC10B1R M74HC10C1R M54/74HC10 74HC10 74LS10 truth table

    74HC10

    Abstract: 74HC10 equivalent 54HC 74HC M54HC10 M74HC10 of IC 74ls10 gs 74LS10
    Text: 7 / SGS-THOMSON M54HC10 M74HC10 KÆ0 ^©i[L[l gïï[^©[ROD(gS TRIPLE 3-INPUT NAND GATE i HIGH SPEED tPD = 8 ns (TYP. at VCc = 5V LOW POWER DISSIPATION Ice = 1 /*A (MAX.) at Ta = 25°C HIGH NOISE IMMUNITY VNIH = VNIL = 28% Vcc (MIN.) OUTPUT DRIVE CAPABILITY


    OCR Scan     		PDF M54HC10 M74HC10 54/74LS10 M54/74HC10 74HC10 74HC10 equivalent 54HC 74HC M74HC10 of IC 74ls10 gs 74LS10

    J-K Flip flops

    Abstract: No abstract text available
    Text: MITSUBISHI HIGH S P E E D CMOS M74HC107P/FP/DP DUAL J-K F L I P - F L O P WITH R E S E T DESCRIPTION The M74HC107 is a semiconductor integrated circuit con­ sisting of two negative-edge triggered J-K flip flops with in­ dependent control inputs PIN CONFIGURATION TOP VIEW


    OCR Scan     		PDF M74HC107P/FP/DP M74HC107 50MHz 10/uW/package, 74LSTTL 14P2P 14-PIN 16P2P 16-PIN 20P2V J-K Flip flops

    74hc109m

    Abstract: 74HC109 74HC109B1R M74HC109
    Text: r z 7 SCS-THOMSON Ä 7 # [M0œm[I gïïM3[] S M54HC109 M74HC109 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • HIGH SPEED fM A X = 63 MHz (TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 2 nA (MAX.) AT T a = 25 ‘C ■ HIGH NOISE IMMUNITY V nih = Vnil = 28 % Vcc (MIN.)


    OCR Scan     		PDF M54HC109 M74HC109 54/74LS109 M54/74HC109 M54/M74HC109 S-1C170 00S44A3 74hc109m 74HC109 74HC109B1R M74HC109

    M74HC109

    Abstract: No abstract text available
    Text: _ SbE » • 7TETS37 DQ3Tfl3b TTT ■ S Û T H _ Æ 7 SGS-THOM SON ^ 7 # « HO g (Q i[Li(g KilOgi M54HC109 M74HC109 T -% -0 7 -O f S 6 S-THOHSON DUAL J-K FLIP FLOP WITH PRESET AND CLEAR ■ HIGH SPEED fMAX = 60 MHz (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION


    OCR Scan     		PDF 7TETS37 M54HC109 M74HC109 54/74LS109 S-10164 M74HC109

    74LS10 mitsubishi

    Abstract: No abstract text available
    Text: M IT S U B IS H I HIGH SPEED CMOS M74HC10P/FP/DP T R IP L E 3 -IN P U T P O S IT IV E NAND GATE DESCRIPTION PIN CONFIGURATION TOP VIEW The M74HC10 is a semiconductor integrated circuit con­ sisting of three 3-input positive-logic NAND gates, usable as negative-logic NOR gates.


    OCR Scan     		PDF M74HC10P/FP/DP M74HC10 74LSTTL 14P2P 14-PIN 16P2P 16-PIN 20P2V 20-PIN 74LS10 mitsubishi

    M74HC109

    Abstract: No abstract text available
    Text: Æ 7 SCS-THOMSON Ä 7# HO i@I[L[iM©iD gÌ M54HC109 M74HC109 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • HIGH SPEED fMAX = 60 MHz (TYP. at VCC = 5V ■ LOW POWER DISSIPATION Ice = 2 i iA (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY V N|H = VNIL = 28% VCc (MIN.)


    OCR Scan     		PDF M54HC109 M74HC109 54/74LS109 M54/74HC109 M54/74HC109 M74HC109

    M74HC109

    Abstract: 54HC 74HC M54HC109 74LS109
    Text: H S -C M O S INTEGRATED CIRCUITS 7 n M54HC109 4 f' M74HC109 P R E L IM IN A R Y D A T A DUAL J-K FLIP FLOP WITH PRESET AND CLEAR DESCRIPTION T h e M 5 4 /7 4 H C 1 0 9 is a hig h s p e e d C M O S D U A L J-K F L IP F L O P W IT H P R E S E T A N D C L E A R


    OCR Scan     		PDF M54HC109 M74HC109 M54/74HC109 M74HC109 54HC 74HC M54HC109 74LS109