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    M12L Search Results

    M12L Result Highlights (5)

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    BCR12CM-12LA#B00 Renesas Electronics Corporation Triacs, TO-220, /Bag Visit Renesas Electronics Corporation
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    BCR6AM-12LA#B00 Renesas Electronics Corporation Triacs, TO-220, /Bag Visit Renesas Electronics Corporation
    BCR6CM-12LB#BB0 Renesas Electronics Corporation 600V - 6A - Triac Medium Power Use, TO-220AB, /Tube Visit Renesas Electronics Corporation
    BCR12KM-12LA#B00 Renesas Electronics Corporation Triacs, TO-220FN, /Tube Visit Renesas Electronics Corporation
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    YAGEO Corporation RC1206FR-074M12L

    RES 4.12M OHM 1% 1/4W 1206
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    DigiKey RC1206FR-074M12L Digi-Reel 15,000 1
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    Avnet Americas RC1206FR-074M12L Reel 28 Weeks 5,000
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    Avnet Abacus RC1206FR-074M12L Reel 20 Weeks 5,000
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    Vishay Semiconductors V2PM12LHM3-H

    DIODE SCHOTTKY 120V 1.8A DO220AA
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    DigiKey V2PM12LHM3-H Cut Tape 8,512 1
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    V2PM12LHM3-H Digi-Reel 8,512 1
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    Vishay Semiconductors V2PM12L-M3-H

    DIODE SCHOTTKY 120V 1.8A DO220AA
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    DigiKey V2PM12L-M3-H Reel 6,000 3,000
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    OMRON Industrial Automation E2B-M12LN08-M1-B1

    SENSOR PROX INDUCTIVE 8MM CYLIND
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    DigiKey E2B-M12LN08-M1-B1 Bulk 15 1
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    Maury Microwave Corporation SF-N-MM-12-LP

    COAX CBL N-TYPE TO N-TYPE
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    TestEquity LLC SF-N-MM-12-LP
    • 1 $130
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    M12L Datasheets (57)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    M12L-05BMMM-SL8H01 Amphenol LTW Technology CBL 5POS MALE TO WIRE 3.28' Original PDF
    M12L-05BMMM-SL8H02 Amphenol LTW Technology CBL 5POS MALE TO WIRE 6.56' Original PDF
    M12L-05BMMM-SL8H05 Amphenol LTW Technology CBL 5POS MALE TO WIRE 16.4' Original PDF
    M12L-05BMMM-SR8H01 Amphenol LTW Technology CBL 5POS MALE TO WIRE 3.28' Original PDF
    M12L-05BMMM-SR8H02 Amphenol LTW Technology CBL 5POS MALE TO WIRE 6.56' Original PDF
    M12L-05BMMM-SR8H05 Amphenol LTW Technology CBL 5POS MALE TO WIRE 16.4' Original PDF
    M12L-05PFDP-EE0001 Amphenol LTW Technology Cconnector FMALE INSERT 5P GOLD SOLDER Original PDF
    M12L-05PFFP-EE0001 Amphenol LTW Technology Cconnector FMALE INSERT 5P GOLD SOLDER Original PDF
    M12L128168A Elite Semiconductor Memory Technology 2M Dram Original PDF
    M12L128168A-5T Elite Semiconductor Memory Technology 2M x 16 Bit x 4 Banks Synchronous DRAM Original PDF
    M12L128168A-5TG Elite Semiconductor Memory Technology 2M x 16 Bit x 4 Banks Synchronous DRAM Original PDF
    M12L128168A-6/7T Mitsubishi 2M x 16 Bit x 4 Banks Synchronous DRAM Original PDF
    M12L128168A-6T Elite Semiconductor Memory Technology 2M x 16 Bit x 4 Banks Synchronous DRAM Original PDF
    M12L128168A-6TG Elite Semiconductor Memory Technology 2M x 16 Bit x 4 Banks Synchronous DRAM Original PDF
    M12L128168A-7T Elite Semiconductor Memory Technology 2M x 16 Bit x 4 Banks Synchronous DRAM Original PDF
    M12L128324A-6BG Elite Semiconductor Memory Technology 1M x 32 Bit x 4 Banks Synchronous DRAM Original PDF
    M12L128324A-6TG Elite Semiconductor Memory Technology 1M x 32 Bit x 4 Banks Synchronous DRAM Original PDF
    M12L128324A-7TG Elite Semiconductor Memory Technology 1M x 32 Bit x 4 Banks Synchronous DRAM Original PDF
    M12L16161A Elite Semiconductor Memory Technology 512K x 16-Bit x 2Banks Synchronous DRAM Original PDF
    M12L16161A Elite Semiconductor Memory Technology 512K x 16-Bit x 2Banks Synchronous DRAM Original PDF

    M12L Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    M12L64164A

    Abstract: No abstract text available
    Text: ESMT M12L64164A SDRAM 1M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y ORDERING INFORMATION PRODUCT NO. JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3


    Original     		M12L64164A M12L64164A-5TG M12L64164A-6TG M12L64164A-7TG M12L64164A-5BG M12L64164A-6BG M12L64164A-7BG 200MHz 166MHz 143MHz M12L64164A PDF

    Untitled

    Abstract: No abstract text available
    Text: ESMT M12L128168A 2L Operation Temperature Condition -40°C~85°C SDRAM 2M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs


    Original     		M12L128168A M12L128168A-5TIG2L M12L128168A-5BIG2L M12L128168A-6TIG2L M12L128168A-6BIG2L M12L128168A-7TIG2L M12L128168A-7BIG2L 200MHz 166MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: ESMT M12L64164A Revision History Revision 1.0 13 Dec. 2001 - Original Revision 1.1 (10 Jan. 2002) - Add -6 spec Revision 1.2 (30 Jan. 2002) - Delete Page44 PACKING DIMENSION 54-LEAD TSOP(II) SDRAM (400mil) (1:4). Revision 1.3 (26 Apr. 2002) - tRFC : 60ns. (Page5)


    Original     		Page44 54-LEAD 400mil) M12L64164A 130mA-- 180mA PDF

    M12L64164A

    Abstract: M12L64164A-5TG M12L64164A-7TG M12L64164A-6TG M12L64164A-7T
    Text: ESMT M12L64164A SDRAM 1M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3 - Burst Length (1, 2, 4, 8 & full page)


    Original     		M12L64164A 400mil 875mil M12L64164A-5TG 200MHz M12L64164A-6TG 166MHz M12L64164A-7TG 143MHz M12L64164A-5BG M12L64164A M12L64164A-5TG M12L64164A-7TG M12L64164A-6TG M12L64164A-7T PDF

    M12L25616

    Abstract: M12L2561616A-7TG M12L2561616A M12L2561616A-6BG M12L2561616A-6TG
    Text: ESMT M12L2561616A 4M x 16 Bit x 4 Banks SDRAM Synchronous DRAM FEATURES y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3


    Original     		M12L2561616A M12L2561616A-6TG 166MHz M12L2561616A-6BG M12L2561616A-7TG 143MHz M12L2561616A-7BGin M12L25616 M12L2561616A-7TG M12L2561616A M12L2561616A-6BG M12L2561616A-6TG PDF

    M12L64322A-5TG

    Abstract: M12L64322A M12L64322A-6T M12L64322A-6TG M12L64322A-7T m12l64322a7tg
    Text: ESMT M12L64322A Revision History Revision 0.1 Dec. 28 1998 -Original Revision 0.2(Jan. 29 1999) -Add page 45 "Packing Dimension" Revision 0.3(Apr. 20 2000) -Modify 6 tss from 2 to 1.5ns.(Page 7) Revision 0.4(May. 09 2001) - 64ms refresh period (4K cycle) -> 15.6 s refresh interval (P.1)


    Original     		M12L64322A 86-LEAD 400mil) M12L64322A-5TG M12L64322A M12L64322A-6T M12L64322A-6TG M12L64322A-7T m12l64322a7tg PDF

    Untitled

    Abstract: No abstract text available
    Text: M12L16161A 2Q SDRAM 512K x 16Bit x 2Banks Synchronous DRAM GENERAL DESCRIPTION FEATURES JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Dual banks operation MRS cycle with address key programs CAS Latency (2 & 3 ) Burst Length (1, 2, 4, 8 & full page)


    Original     		M12L16161A 16Bit M12L16161A PDF

    Untitled

    Abstract: No abstract text available
    Text: ESM T M12L64164A 2Y Operation Temperature Condition -40°C~85°C SDRAM 1M x 16 Bit x 4 Banks Synchronous DRAM FEATURES ORDERING INFORMATION „ „ „ „ „ „ „ „ JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation


    Original     		M12L64164A M12L64164A-5TIG2Y 200MHz M12L64164A-6TIG2Y 166ain PDF

    M12L64322A-5TG

    Abstract: No abstract text available
    Text: ESM T M12L64322A 2U SDRAM 512K x 32 Bit x 4 Banks Synchronous DRAM FEATURES „ „ „ „ „ „ „ „ ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs


    Original     		M12L64322A M12L64322A-5TG2U 200MHz M12L64322A-6TG2U 166MHz M12L64322A-7TG2U 143MHz M12L64322A-5TG PDF

    Untitled

    Abstract: No abstract text available
    Text: ESM T M12L128168A 2L Operation Temperature Condition -40 C~85 C SDRAM 2M x 16 Bit x 4 Banks Synchronous DRAM FEATURES „ „ „ „ „ „ „ „ „ JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs


    Original     		M12L128168A M12L128168A-5TIG2L 200MHz M12L1281tain PDF

    M12L2561616A-5TG2S

    Abstract: No abstract text available
    Text: ESMT M12L2561616A 2S SDRAM 4M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency ( 2 & 3 )


    Original     		M12L2561616A M12L2561616A-5TG2S 200MHz M12L2561616A-6TG2S 166MHz M12L2561616Aain M12L2561616A-5TG2S PDF

    SDRAM

    Abstract: M12L128168A-5TG M12L128168A6TG2N m12l128168a-7tg
    Text: ESMT SDRAM M12L128168A 2N 2M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency ( 2 & 3 ) - Burst Length ( 1, 2, 4, 8 & full page )


    Original     		M12L128168A M12L128168A-5TG2N M12L128168A-5BG2N M12L128168A-6TG2N M12L128168A-6BG2N M12L128168A-7TG2N M12L128168A-7BG2N 200MHz 166MHz 143MHz SDRAM M12L128168A-5TG M12L128168A6TG2N m12l128168a-7tg PDF

    M12L2561616A-7TG2K

    Abstract: No abstract text available
    Text: ESMT M12L2561616A 2K SDRAM 4M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y y ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency ( 2 & 3 )


    Original     		M12L2561616A M12L2561616A-5TG2K M12L2561616A-5BG2K M12L2561616A-6TG2K M12L2561616A-6BG2K M12L2561616A-7TG2K M12L2561616A-7BG2K 200MHz 166MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: ESMT M12L32321A SDRAM 512K x 32Bit x 2Banks Synchronous DRAM FEATURES z z z z z z z z z GENERAL DESCRIPTION The M12L32321A is 33,554,432 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 32 bits, fabricated with high performance CMOS technology.


    Original     		M12L32321A 32Bit M12L32321A PDF

    Untitled

    Abstract: No abstract text available
    Text: ESMT M12L64164A SDRAM 1M x 16 Bit x 4 Banks Synchronous DRAM FEATURES ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3 - Burst Length (1, 2, 4, 8 & full page)


    Original     		M12L64164A 400mil 875mil M12L64164A-6T 166MHz M12L64164A-7T 143MHz M12L64164A-6TG M12L64164A-7TG PDF

    Untitled

    Abstract: No abstract text available
    Text: ESMT M12L64164A SDRAM 1M x 16 Bit x 4 Banks Synchronous DRAM FEATURES y y y y y y y y JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3 - Burst Length (1, 2, 4, 8 & full page)


    Original     		M12L64164A 400mil 875mil M12L64164A-5TG 200MHz M12L64164A-6TG 166MHz M12L64164A-7TG 143MHz M12L64164A-5BG PDF

    Untitled

    Abstract: No abstract text available
    Text: ESMT Preliminary M12L32162A Revision History Revision 0.1 Aug. 11 2006 -Original Revision 0.2 (Mar. 15 2007) -Add BGA package Elite Semiconductor Memory Technology Inc. Publication Date : Mar. 2007 Revision : 0.2 1/29 ESMT Preliminary M12L32162A SDRAM 1M x 16Bit x 2Banks


    Original     		M12L32162A 16Bit PDF

    Untitled

    Abstract: No abstract text available
    Text: ESMT M12L128168A 2M x 16 Bit x 4 Banks SDRAM Synchronous DRAM FEATURES ORDERING INFORMATION ! ! ! ! 54 Pin TSOP Type II (400mil x 875mil ) ! ! ! ! ! JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs


    Original     		M12L128168A 400mil 875mil M12L128168A-6T 166MHz M12L128168A-7T 143MHz M12L128ain PDF

    Untitled

    Abstract: No abstract text available
    Text: ESMT M12L128168A 2M x 16 Bit x 4 Banks SDRAM Synchronous DRAM FEATURES ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3 - Burst Length ( 1, 2, 4, 8 & full page )


    Original     		M12L128168A 400mil 875mil M12L128168A-6T 166MHz M12L128168A-7T 143MHz M12L128168A PDF

    Untitled

    Abstract: No abstract text available
    Text: ESMT M12L16161A Revision History Revision 0.1 Oct. 23 1998 -Original Revision 0.2 (Dec. 4 1998) -Add 200MHZ Revision V1.0 (Dec. 10 1999) -Delete Preliminary -Rename the filename Revision V1.1 (Jan. 26 2000) -Add –5.5 Spec. Revision V1.2 (Apr. 25 2000)


    Original     		M12L16161A 200MHZ 127mm PDF

    M12L64322A-5TG

    Abstract: No abstract text available
    Text: ESMT M12L64322A Revision History Revision 0.1 Dec. 28 1998 -Original Revision 0.2(Jan. 29 1999) -Add page 45 "Packing Dimension" Revision 0.3(Apr. 20 2000) -Modify 6 tss from 2 to 1.5ns.(Page 7) Revision 0.4(May. 09 2001) - 64ms refresh period (4K cycle) -> 15.6 s refresh interval (P.1)


    Original     		M12L64322A 86-LEAD 400mil) M12L64322A-5TG PDF

    M12L16161A-7TG

    Abstract: M12L16161A M12L16161A-5TG M12L16161
    Text: ESMT M12L16161A SDRAM 512K x 16Bit x 2Banks Synchronous DRAM FEATURES z z z z z z z z z GENERAL DESCRIPTION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Dual banks operation MRS cycle with address key programs CAS Latency 2 & 3


    Original     		M12L16161A 16Bit M12L16161A M12L16161A-7TG M12L16161A-5TG M12L16161 PDF

    M12L128168A-5TG

    Abstract: M12L128168A M12L128168A-6TG M12L128168A-7TG M12L128168A-6T M12L128168A-7T esmt m12l128168a
    Text: ESMT M12L128168A 2M x 16 Bit x 4 Banks SDRAM Synchronous DRAM FEATURES ORDERING INFORMATION JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency 2 & 3 - Burst Length ( 1, 2, 4, 8 & full page )


    Original     		M12L128168A 400mil 875mil M12L128168A-5TG 200MHz M12L128168A-6TG 166MHz M12L128168A-7TG 143MHin M12L128168A-5TG M12L128168A M12L128168A-6TG M12L128168A-7TG M12L128168A-6T M12L128168A-7T esmt m12l128168a PDF

    Untitled

    Abstract: No abstract text available
    Text: ESMT M12L32321A Revision History Revision 0.1 Sep. 15 2006 -Original Revision 0.2 (Dec. 05 2006) -Add -5.5 & -6BG spec Revision 0.3 (Mar. 02 2007) - Delete BGA ball name of packing dimensions Revision 0.4 (May. 03 2007) - Modify DC Characteristics Revision 0.5 (Jun. 08 2007)


    Original     		M12L32321A M12L32321A 32Bit PDF