Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    LVDS 30P Search Results

    LVDS 30P Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    BTFW30R-3RBTE4LF Amphenol Communications Solutions 30P RECEPTACLE,SMT,TIN PLATED-BTFW30R Visit Amphenol Communications Solutions
    BTFW30P-3SSTGE4LF Amphenol Communications Solutions 30P PLUG,SMT,GOLD PLATED-BTFW30P Visit Amphenol Communications Solutions
    BTFW30R-3RSTGE4LF Amphenol Communications Solutions 30P RECEPTACLE,SMT,GOLD PLATED-BTFW30R Visit Amphenol Communications Solutions
    10035388-204LF Amphenol Communications Solutions Power Card Edge, Power Connectors, 2 x 30P STB Right Angle. Visit Amphenol Communications Solutions
    BTFW30P-3SBTGE4LF Amphenol Communications Solutions 30P PLUG SMT W POST AU P-BTFW30P-3SBTGE4LF Visit Amphenol Communications Solutions

    LVDS 30P Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: MAX9376 LVDS/Anything-to-LVPECL/LVDS Dual Translator General Description The MAX9376 is a fully differential, high-speed, LVDS/ anything-to-LVPECL/LVDS dual translator designed for signal rates up to 2GHz. One channel is LVDS/ anything-to-LVPECL translator and the other channel


    Original
    PDF MAX9376 MAX9376 MAX9376â 100mV.

    Untitled

    Abstract: No abstract text available
    Text: 19-2809; Rev 1; 10/09 LVDS/Anything-to-LVPECL/LVDS Dual Translator The MAX9376 is a fully differential, high-speed, LVDS/anything-to-LVPECL/LVDS dual translator designed for signal rates up to 2GHz. One channel is LVDS/anything-to-LVPECL translator and the other


    Original
    PDF MAX9376 MAX9376â 100mV. MAX9376

    JESD51-7

    Abstract: MAX9376 MAX9376EUB 630ps
    Text: 19-2809; Rev 1; 10/09 LVDS/Anything-to-LVPECL/LVDS Dual Translator The MAX9376 is a fully differential, high-speed, LVDS/anything-to-LVPECL/LVDS dual translator designed for signal rates up to 2GHz. One channel is LVDS/anything-to-LVPECL translator and the other


    Original
    PDF MAX9376 100mV. MAX9376 JESD51-7 MAX9376EUB 630ps

    Untitled

    Abstract: No abstract text available
    Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select one of two differential LVPECL, LVDS, HCSL, or CML input pairs to distribute to four LVDS output pairs


    Original
    PDF CY2DL1504 CY2DL1504

    MAX9376

    Abstract: MAX9376EUB
    Text: 19-2809; Rev 0; 4/03 LVDS/Anything-to-LVPECL/LVDS Dual Translator Features ♦ Guaranteed 2GHz Switching Frequency ♦ Accepts LVDS/LVPECL/Anything Inputs ♦ 421ps typ Propagation Delays ♦ 30ps (max) Pulse Skew ♦ 2psRMS (max) Random Jitter ♦ Minimum 100mV Differential Input to Guarantee


    Original
    PDF 421ps 100mV MAX9376EUB MAX9376 MAX9376 MAX9376EUB

    2DL15

    Abstract: JESD78B CY2DL1504ZXI 2DL-15
    Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select between low-voltage positive emitter-coupled logic LVPECL or low-voltage differential signal (LVDS) input pairs to distribute to four LVDS output pairs


    Original
    PDF CY2DL1504 CY2DL1504 2DL15 JESD78B CY2DL1504ZXI 2DL-15

    cy2dl1504

    Abstract: No abstract text available
    Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select between low-voltage positive emitter-coupled logic LVPECL or low-voltage differential signal (LVDS) input pairs to distribute to four LVDS output pairs


    Original
    PDF CY2DL1504 CY2DL1504

    2DL15

    Abstract: 2DL-15 2VBQ
    Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select one of two differential LVPECL, LVDS, or CML input pairs to distribute to four LVDS output pairs ■ 30-ps maximum output-to-output skew


    Original
    PDF CY2DL1504 30-ps 480-ps 11-ps 12-kHz 20-MHz 20-pin CY2DL1504 2DL15 2DL-15 2VBQ

    Untitled

    Abstract: No abstract text available
    Text: CY2DL1504 1:4 Differential LVDS Fanout Buffer with Selectable Clock Input Features Functional Description • Select one of two differential LVPECL, LVDS, HCSL, or CML input pairs to distribute to four LVDS output pairs ■ 30-ps maximum output-to-output skew


    Original
    PDF CY2DL1504 CY2DL1504

    Untitled

    Abstract: No abstract text available
    Text: PI6LC48L0201 2-Output LVDS Networking Clock Generator Features Description ÎÎTwo differential LVDS output pairs The PI6LC48L0201 is a 2-output LVDS synthesizer optimized to generate Ethernet reference clock frequencies and is a member of Pericom’s HiFlex family of high performance clock solutions.


    Original
    PDF PI6LC48L0201 PI6LC48L0201 25MHz 125MHz, 25MHz 20-pin, 173mil PD-1311 PI6LC48L0201LE

    MC100EP210S

    Abstract: MC100EP210SFA MC100EP210SFAR2 100EP MC100 QA050 EP210S
    Text: MC100EP210S 2.5VĄ1:5 Dual Differential LVDS Compatible Clock Driver The MC100EP210S is a low skew 1–to–5 dual differential driver, designed with LVDS clock distribution in mind. The LVDS or LVPECL input signals are differential and the signal is fanned out to


    Original
    PDF MC100EP210S MC100EP210S EP210S r14525 MC100EP210S/D MC100EP210SFA MC100EP210SFAR2 100EP MC100 QA050

    MAX9220EUM

    Abstract: No abstract text available
    Text: MAX9210/MAX9214/ MAX9220/MAX9222 General Description The MAX9210/MAX9214/MAX9220/MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/ LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply,


    Original
    PDF MAX9210/MAX9214/ MAX9220/MAX9222 MAX9210/MAX9214/MAX9220/MAX9222 MAX9209/MAX9213 MAX9210/MAX9214 21-bit MAX9220EUM

    Untitled

    Abstract: No abstract text available
    Text: EURO QUARTZ GDF576 LVDS VCXO 7 x 5 x 1.8mm SMD VCXO 38.0MHz to 640.0MHz Frequency range 38MHz to 640MHz LVDS Output Supply Voltage 3.3 VDC Phase jitter 0.4ps typical Pull range from ±30ppm to ±150ppm DESCRIPTION GDF576 VCXOs are LVDS output VCXOs packaged in 6 pad 7mm x


    Original
    PDF 38MHz 640MHz 30ppm 150ppm GDF576 100Hz 10kHz 100kHz 10MHz 20ppm

    Untitled

    Abstract: No abstract text available
    Text: Tel : Fax : email : 0044 0 118 979 1238 0044 (0) 118 979 1283 info@actcrystals.com ACT9212LJ 7x5mm LOW PHASE JITTER LVPECL / LVDS OSCILLATOR ACT9312LJ 5x3.2mm LOW PHASE JITTER LVPECL / LVDS OSCILLATOR The ACT9212LJ / 9213LJ LVPECL & LVDS Oscillators are a series of miniature low profile devices allowing for frequencies from 38 to


    Original
    PDF ACT9212LJ ACT9312LJ 9213LJ ACT9200 RL25000C- C2222-PF) ISO9001

    Untitled

    Abstract: No abstract text available
    Text: 19-2864; Rev 5; 11/07 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9214/MAX9220/MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing


    Original
    PDF 21-Bit MAX9210/MAX9214/MAX9220/MAX9222 MAX9209/MAX9213 MAX9210/MAX9214 MAX9212/MAX9216 MAX9210/MAX9214/MAX9220/MAX9222

    Untitled

    Abstract: No abstract text available
    Text: EURO QUARTZ GDF62 LVDS VCXO 11.4 x 9.6 x 2.5mm SMD VCXO 38.0MHz to 640.0MHz Frequency range 38MHz to 640MHz LVDS Output Supply Voltage 3.3 VDC Phase jitter 0.4ps typical Pull range from ±30ppm to ±150ppm OUTLINE & DIMENSIONS DESCRIPTION GDF62 VCXOs are LVDS output VCXOs packaged in 6 pad 11.4 x 9.6


    Original
    PDF 38MHz 640MHz 30ppm 150ppm GDF62 20ppm 10kHz 100kHz 10MHz

    Untitled

    Abstract: No abstract text available
    Text: EURO QUARTZ GDW62 LVDS VCXO 750.0kHz to 800.0MHz 11.4 x 9.6 x 2.5mm 6 pad SMD Frequency range 750kHz to 800MHz LVDS Output Supply Voltage 3.3 VDC Phase jitter 2.35ps typical Pull range from ±30ppm to ±150ppm DESCRIPTION OUTLINE & DIMENSIONS GDW576 LVDS output VCXOs are packaged in 6 pad 7 x 5mm SMD.


    Original
    PDF 750kHz 800MHz 30ppm 150ppm GDW62 GDW576 20ppm 100Hz 10kHz 100kHz

    Untitled

    Abstract: No abstract text available
    Text: EURO QUARTZ GDW576 LVDS VCXO 7 x 5 x 1.8mm SMD VCXO 750.0kHz to 800.0MHz Frequency range 750kHz to 800MHz LVDS Output Supply Voltage 3.3 VDC Phase jitter 2.35ps typical Pull range from ±30ppm to ±150ppm DESCRIPTION OUTLINE & DIMENSIONS GDW576 LVDS output VCXOs are packaged in 6 pad 7 x 5mm SMD.


    Original
    PDF 750kHz 800MHz 30ppm 150ppm GDW576 20ppm 3GDW576 B-80N-60

    MAX9210

    Abstract: MAX9215 MAX9222 DS90CR216A DS90CR218A MAX9220EUM
    Text: 19-2864; Rev 3; 4/04 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels.


    Original
    PDF 21-Bit MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 MAX9209/MAX9211/MAX9213/ MAX9215 MAX9210/MAX9212/MAX9214/MAX9216 MAX9210 DS90CR216A DS90CR218A MAX9220EUM

    Untitled

    Abstract: No abstract text available
    Text: EURO QUARTZ GDA576 LVDS VCXO 7 x 5 x 1.8mm SMD VCXO Frequency range 60MHz to 240MHz LVDS Output Supply Voltage 3.3 VDC Phase jitter 0.2ps typical Pull range from ±30ppm to ±150ppm DESCRIPTION GDA576 VCXOs are packaged in a 6 pad 7mm x 5mm SMD package. Typical phase jitter for GDA series VCXOs is 0.2 ps. Output is LVDS.


    Original
    PDF GDA576 60MHz 240MHz 30ppm 150ppm 120MHz: 120MHz 240MHz:

    MAX9220EUM

    Abstract: No abstract text available
    Text: 19-2864; Rev 4; 3/05 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels.


    Original
    PDF 21-Bit MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 MAX9209/MAX9211/MAX9213/ MAX9215 MAX9210/MAX9212/MAX9214/MAX9216 21-0155C MAX9222EUM MAX9220EUM

    GDF576

    Abstract: No abstract text available
    Text: EURO QUARTZ GDF576 LVDS VCXO 7 x 5 x 1.8mm SMD VCXO Frequency range 38MHz to 640MHz LVDS Output Supply Voltage 3.3 VDC Phase jitter 0.4ps typical Pull range from ±30ppm to ±150ppm DESCRIPTION GDF576 VCXOs are packaged in a 6 pad 7mm x 5mm SMD package. Typical phase jitter for GDF series VCXOs is 0.4 ps. Output is LVDS.


    Original
    PDF GDF576 38MHz 640MHz 30ppm 150ppm 20ppm 3GDF576 B-80N-60 GDF576

    Untitled

    Abstract: No abstract text available
    Text: 19-2864; Rev 4; 3/05 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels.


    Original
    PDF 21-Bit MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 MAX9209/MAX9211/MAX9213/ MAX9215 MAX9210/MAX9212/MAX9214/MAX9216 D222EUM MAX9220EUM

    DS90CR216A

    Abstract: DS90CR218A MAX9210 MAX9215 MAX9222
    Text: 19-2864; Rev 4; 3/05 Programmable DC-Balance 21-Bit Deserializers The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels.


    Original
    PDF 21-Bit MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/ MAX9222 MAX9209/MAX9211/MAX9213/ MAX9215 MAX9210/MAX9212/MAX9214/MAX9216 DS90CR216A DS90CR218A MAX9210