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    Abstract: lm034 74LS174 example LMH0340 LMH00341 SDI SERIALIZER 74LS174 LMH0040 LMH0041 LMH0050
    Text: National Semiconductor Application Note 1988 Nate Unger, Mark Sauerwald July 17, 2009 Introduction The SerDes unique architecture is designed specifically to address the interface requirements of low cost FPGA devices. The 5-bit LVDS parallel data interface simplifies board layout


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    PDF 600Mbps LMH0340 LMH0341 AN-1988 LM0341 lm034 74LS174 example LMH00341 SDI SERIALIZER 74LS174 LMH0040 LMH0041 LMH0050