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    LH5492 Search Results

    LH5492 Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Type PDF
    LH5492U-25 Sharp SRAM FIFO Original PDF
    LH5492U-30 Sharp SRAM FIFO Original PDF
    LH5492U-35 Sharp SRAM FIFO Original PDF

    LH5492 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    LH5492

    Abstract: 32-PIN
    Text: LH5492 FEATURES • Fast Cycle Times: 25/30/35 ns Frequency: 40/33/28.5 MHz • Parallel Data In; Parallel Data Out • Two Read Enable Inputs and Two Write Enable Inputs, Sampled on Rising Edge of the Appropriate Clock • Fast-Fall-Through Time Internal Architecture Based


    Original     		PDF LH5492 32PLCC-1 32-pin, 450-mil 32-pin PLCC32-P-R450-PED) LH5492U-25 5492MD LH5492

    Untitled

    Abstract: No abstract text available
    Text: LH5492 4 K x 9 Clocked FIFO FEATURES status output signals are synchronized to these clocks, to simplify system design. The input and output ports oper­ ate altogether independently of each other, except when the FIFO becomes either totally full or else totally empty.


    OCR Scan     		PDF LH5492 32-Pin PLCC32-P-R450-PED) 32-pin, 450-mil LH5492U-25

    Untitled

    Abstract: No abstract text available
    Text: LH5492 FEATURES • Fast Cycle Times: 25/30/35 ns Frequency: 40/33/28.5 MHz • Parallel Data In; Parallel Data Out • Two Read Enable Inputs and Two Write Enable Inputs, Sampled on Rising Edge of the Appropriate Clock • Fast-Fall-Through Time Internal Architecture Based


    OCR Scan     		PDF LH5492 32-Pin 32PLCC PLCC32-P-R450-PED) 32-pin, 450-mil LH5492 LH5492U-25

    organizational structure samsung

    Abstract: CYPRESS SAMSUNG CROSS REFERENCE DALLAS cross reference VITELIC MK4501 ic cross reference book CY7C408 mosel KM75C02
    Text: FIFO Cross Reference FIFO CROSS REFERENCE ORGANIZATIONAL STRUCTURE SHARP MODEL * COMPETITIVE VENDOR 256 X 36 X 2 LH5420 LH5481 64 X 8 64 X 9 LH5491 4,096 X 9 4,096 X 9 4,096 X 9 1,024 X 9 2,048 X 9 X LH5493 LH5494 LH5496/96H 512 X 9 4.096 LH5492 9 LH5497/97H


    OCR Scan     		PDF LH5420 MS76542 NMF256X36X2 CY7C408 NMF64X8 CY7C409 NMF64X9 MS76492 NMFC5492 MS76493 organizational structure samsung CYPRESS SAMSUNG CROSS REFERENCE DALLAS cross reference VITELIC MK4501 ic cross reference book mosel KM75C02

    lh5492

    Abstract: No abstract text available
    Text: LH5492-/ 4K x 9 Clocked FIFO simplify system design. The input and output ports oper­ ate altogether independently of each other, except when the FIFO becomes either absolutely full or else absolutely empty. FEATURES • Fast Cycle Times: 25/35/50 ns Frequency: 40/28.5/20 MHz


    OCR Scan     		PDF LH5492-/ 32-Pin Oct91 LH5492 LHE492 PLCC32-P-S450) LH5492U-25 lh5492

    Untitled

    Abstract: No abstract text available
    Text: LH5492 FEATURES • Fast Cycle Times: 25/30/35 ns Frequency: 40/33/28.5 MHz • Parallel Data In; Parallel Data Out • Two Read Enable Inputs and Two Write Enable Inputs, Sampled on Rising Edge of the Appropriate Clock • Fast-Fall-Through Time Internal Architecture Based


    OCR Scan     		PDF LH5492 32-Pin PLCC32-P-R450) LH5492U-25 5492MD

    Untitled

    Abstract: No abstract text available
    Text: LH5492 FEATURES • Fast Cycle Times: 25/30/35 ns Frequency: 40/33/28.5 MHz • Parallel Data In; Parallel Data Out • Two Read Enable Inputs and Two Write Enable Inputs, Sampled on Rising Edge ot the Appropriate Clock • Fast-Fall-Through Time Internal Architecture Based


    OCR Scan     		PDF LH5492 32-Pin LH5492 PLCC32-P-R450-PED) LH5492LJ-25 5492M

    Untitled

    Abstract: No abstract text available
    Text: LH5492 FEATURES • Fast Cycle Times: 25/30/35 ns Frequency: 40/33/28.5 MHz • Parallel Data In; Parallel Data Out • Two Read Enable Inputs and Two Write Enable Inputs, Sampled on Rising Edge of the Appropriate Clock • Fast-Fall-Through Time Internal Architecture Based


    OCR Scan     		PDF LH5492 32-Pin LH5492 PLCC32-P-R450-PED) LH5492U-25 5492MD

    lh57257

    Abstract: IR2E31 IR2E01 IR2C07 IR2E27 IR2E24 IR2E19 IR2E31A IR3n06 IR2E02
    Text: Index Model No. ARM7D CPU Core Bi-CMOS 1 27 40,42 _ _ CMOS CMOS CMOS CMOS CMOS 4A 5A 8 A AH D ID1 Series ID2 Series 40,42 40.42 40,42 40,42 40 B ü.’1*"! 14,15 14 m IR2339 IR2403 IR2406 IR2406G IR2410 IR2411 IR2415 IR2419 IR2420 IR2422 IR2425 IR2429


    OCR Scan     		PDF IR2E201 IR2E24 IR2E27/A IR2E28 IR2E29 IR2E30 IR2E31/A IR2E32N9 IR2E34 IR2E41 lh57257 IR2E31 IR2E01 IR2C07 IR2E27 IR2E19 IR2E31A IR3n06 IR2E02

    Untitled

    Abstract: No abstract text available
    Text: THE SHARP WAY TO CHOOSE A FIFO START FIFO DEPTH 512: ( LH5496 ) (LH 540215) 1K: (LH 5 402 02) (LH 5 402 25) 36/32 1S/16 36/32 <-» 9/8 36/32 -»18/16, 18/16 -> 36/32 36/32 -* 9/8, 9/8 -> 36/32 18/16-»9/8, 9/8 -*18/16 ( LH543621) ( l H543620)3' v H j? 4?.1.1.'


    OCR Scan     		PDF 1S/16 LH5496 LH543621 LH543621) H543620 LH5492 LH540235 LH540245

    toshiba 32k*8 sram

    Abstract: M5M23C100 M5M5265 seeq DQ2816A M5M23C400 MB832001 HITACHI 64k DRAM TC511000 KM41C464 TC51464
    Text: FUNCTION GUIDE MEMORY ICs 3. CROSS REFERENCE GUIDE 3.1 DRAM Density 64 K X 1 256K X 1 X4 1M X X 4M X X 3.2 Mode Org. 1 4 1 4 Samsung Toshiba Hitachi Fujitsu NEC MSM3764 KM4164 Page Okl F. Page KM41C256 TC51256 Nibble KM41C257 TC51257 HM51256 S. Column KM41C258


    OCR Scan     		PDF KM4164 KM41C256 KM41C257 KM41C258 KM41C464 KM41C466 KM41C1000 KM41C1001 KM41C1002 KM44C256 toshiba 32k*8 sram M5M23C100 M5M5265 seeq DQ2816A M5M23C400 MB832001 HITACHI 64k DRAM TC511000 TC51464

    Untitled

    Abstract: No abstract text available
    Text: MEMORIES ★Under development • FIFO M emories Capacity Conlfeuralion word* x bits 64x8 0.5k 64 x 9 4.5k 512x9 1k x 9 9k 512 x 18 2k x 9 18k 1k x 18 256 x 36 x 2 4k x 9 36k 1k x 36 72k QFJ=PLCC 8k x 9 Modal No. LH5481D/U-25 LH5481D/U-35 LH5491D/U-25 LH5491D/U-35


    OCR Scan     		PDF LH5481D/U-25 LH5481D/U-35 LH5491D/U-25 LH5491D/U-35 LH5496/U-15 LH5496/D/U-20 LH5496/D/U-35 LH5496/D/U-50 LH5497/D/U-15 LH5497/D/U-20

    Untitled

    Abstract: No abstract text available
    Text: MEMORIES FIFO M emories ★Under developm ent Type Capacity Configuration Operating frequency MHz MAX. Model No. 25 —i 35 Access time(ns) 15 20 25 35 Package SKDIP QFJ 28 28 28 28 28 28 32 — 28 28 32 28 32 28 32 28 32 50 DIP LH5481 LH5491 j — LH5496


    OCR Scan     		PDF LH5481 LH5491 LH5496 LH5497 LH540202 LH5498 LH540203 LH5499 LH540204 LH540205

    Untitled

    Abstract: No abstract text available
    Text: MEMORIES • FIFO Memories Capacity Configuration words x bits Model No. LH5481D/U-25 Operating frequency (MHz) MAX. 25 Access time (ns) MAX. - Cycle time (ne) MIN. - Supply current operstlng/standby (mA) MAX. Supply voltage (V) 4 5/— Package 28S K -D IP /


    OCR Scan     		PDF LH5481D/U-25 LH5481D/U-35 LH5491 D/U-25 LH5491D/U-35 LH5496/D/U-20 LH540204D/U-20 LH540204D/U-25 LH540204DAJ-35 LH5492U-25