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Catalog Datasheet	MFG & Type	PDF	Document Tags
qfn64 footprint Abstract: TQFP80 footprint dimensions QFN-64 package Text: SiM3U1xx High-Performance, Low-Power, 32-Bit Precision32 USB MCU Family with up to 256 kB of Flash 32-bit ARM Cortex™-M3 CPU - 80 MHz maximum frequency - Single-cycle multiplication, hardware division support - Nested vectored interrupt control NVIC with 16 priority levels	Original	PDF	32-Bit Precision32TM 16-channel 12-Bit 12-bit 10-bit Precision32 qfn64 footprint TQFP80 footprint dimensions QFN-64 package
QFN-64 thermal resistance Abstract: SIM3U167-B-GM TQFP 80 PACKAGE Cortex-M3 Reference Manual tqfp 64 pcb land pattern SIM3U167 CS05 PB3-11 LGA 32 land pattern silicon labs SIM3U134-B-GM Text: SiM3U1xx High-Performance, Low-Power, 32-Bit Precision32 USB MCU Family with up to 256 kB of Flash 32-bit ARM Cortex™-M3 CPU - 80 MHz maximum frequency - Single-cycle multiplication, hardware division support - Nested vectored interrupt control NVIC with 16 levels of	Original	PDF	32-Bit Precision32TM Precision32 QFN-64 thermal resistance SIM3U167-B-GM TQFP 80 PACKAGE Cortex-M3 Reference Manual tqfp 64 pcb land pattern SIM3U167 CS05 PB3-11 LGA 32 land pattern silicon labs SIM3U134-B-GM
TQFP80 footprint dimensions Abstract: Cortex-M3 Reference Manual pb211 tqfp 64 pcb land pattern CRC128 Text: SiM3C1xx High-Performance, Low-Power, 32-Bit Precision32 MCU Family with up to 256 kB of Flash 32-bit ARM Cortex™-M3 CPU - 80 MHz maximum frequency - Single-cycle multiplication, hardware division support - Nested vectored interrupt control NVIC with 16 levels of	Original	PDF	32-Bit Precision32TM Precision32 TQFP80 footprint dimensions Cortex-M3 Reference Manual pb211 tqfp 64 pcb land pattern CRC128
TQFP80 footprint dimensions Abstract: Cortex-M3 Reference Manual pb211 jedec package MO-220 tqfp-64 SIM3C167-B-GM AD6M Text: SiM3C1xx High-Performance, Low-Power, 32-Bit Precision32 MCU Family with up to 256 kB of Flash 32-bit ARM Cortex™-M3 CPU - 80 MHz maximum frequency - Single-cycle multiplication, hardware division support - Nested vectored interrupt control NVIC with 16 priority levels	Original	PDF	32-Bit Precision32TM 16-channel 12-Bit 12-bit 10-bit Precision32 TQFP80 footprint dimensions Cortex-M3 Reference Manual pb211 jedec package MO-220 tqfp-64 SIM3C167-B-GM AD6M
Untitled Abstract: No abstract text available Text: SiM3C1xx High-Performance, Low-Power, 32-Bit MCU Family with up to 256 kB of Flash 32-bit ARM Cortex -M3 CPU - 80 MHz maximum frequency - Single-cycle multiplication, hardware division support - Nested vectored interrupt control NVIC with 16 levels of	Original	PDF	32-Bit SiM3C167-B-GM SiM3C166-B-GM LGA-92 TQFP-80 QFN-64 QFN-40
LGA240 Abstract: LGA48 LGA92 BGA48 LGA300 SUPER CHIP Text: Super CSP Super Chip Scale Package SCSP is a wafer level package that is a true chip size package. It provides a potential solution for “known good die”, or one test point operation as compared to two. In single chip packaging, it is customary to have testing at the wafer probe and again after	Original	PDF	LGA48 LGA92 LGA240 LGA300 RH/48 LGA240 LGA48 LGA92 BGA48 LGA300 SUPER CHIP