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Catalog Datasheet	MFG & Type	Document Tags	PDF
2a18 Abstract: No abstract text available Text: Revised April 2001 LCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs General Description Features These 36-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.	Original	74LCX32500 36-Bit LCX32500 2a18	PDF
1A18 Abstract: 1B18 2A18 2B18 74LCX32500 74LCX32500G MO-205 Text: Revised June 2002 LCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs General Description Features These 36-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.	Original	74LCX32500 36-Bit LCX32500 1A18 1B18 2A18 2B18 74LCX32500 74LCX32500G MO-205	PDF
2A18 Abstract: MO-205 1A18 1B18 2B18 74LCX32500 74LCX32500GX fBGA 80 package Text: Revised August 2001 LCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs General Description Features These 36-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.	Original	74LCX32500 36-Bit LCX32500 2A18 MO-205 1A18 1B18 2B18 74LCX32500 74LCX32500GX fBGA 80 package	PDF
Untitled Abstract: No abstract text available Text: Preliminary Revised January 2001 LCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs Preliminary General Description Features These 36-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.	Original	74LCX32500 36-Bit LCX32500	PDF