LCK4994 Search Results

LCK4994 Datasheets (6)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
LCK4994		Agere Systems	Low-Voltage PLL Clock Drivers		Original	PDF
LCK4994KB-DB		Agere Systems	General PLL, Low-Voltage PLL Clock Drivers		Original	PDF
LCK4994KB-DT		Agere Systems	General PLL, Low Voltage PLL Clock Driver, Tape and Reel		Original	PDF
LCK4994V		Agere Systems	PLL, Low-Voltage PLL Clock Driver		Original	PDF
LCK4994YH-DB		Agere Systems	General PLL, Low-Voltage PLL Clock Drivers		Original	PDF
LCK4994YH-DT		Agere Systems	General PLL, Low-Voltage PLL Clock Drivers, Tape and Reel		Original	PDF

LCK4994 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
DS 2020 Abstract: CY7B993V CY7B994V JESD22-A114 LCK4993 LCK4993YH-DB LCK4993YH-DT LCK4994 chilled water system Text: Data Sheet, Revision 1 May 5, 2004 LCK4993/LCK4994 Low-Voltage PLL Clock Drivers 1 Features • 12 MHz—100 MHz LCK4993 , or 24 MHz—200 MHz (LCK4994) output operation ■ Matched pair output skew <200 ps ■ Zero input-to-output delay ■ 18 LVTTL 50% duty-cycle outputs capable of driving	Original	PDF	LCK4993/LCK4994 Hz--100 LCK4993) Hz--200 LCK4994) DS04-014LCK-1 DS04-014LCK) DS 2020 CY7B993V CY7B994V JESD22-A114 LCK4993 LCK4993YH-DB LCK4993YH-DT LCK4994 chilled water system
LCK4993V Abstract: CY7B993V CY7B994V JESD22-A114 LCK4994 LCK4994V Text: Advance Data Sheet November 2002 LCK4993V/LCK4994V Low-Voltage PLL Clock Drivers Features • 12/100 MHz LCK4993V , or 24/200 MHz (LCK4994V) output operation ■ Matched pair output skew <200 ps ■ Zero input-to-output delay ■ ■ ■ ■ ■ ■ ■ 18 LVTTL 50% duty-cycle outputs capable of	Original	PDF	LCK4993V/LCK4994V LCK4993V) LCK4994V) DS02-346LCK LCK4993V CY7B993V CY7B994V JESD22-A114 LCK4994 LCK4994V
CY7B993V Abstract: CY7B994V LCK4993 LCK4994 Text: Advance Data Sheet December 4, 2003 LCK4993/LCK4994 Low-Voltage PLL Clock Drivers 1 Features • 12 MHz—100 MHz LCK4993 , or 24 MHz—200 MHz (LCK4994) output operation ■ Matched pair output skew <200 ps ■ Zero input-to-output delay ■ ■ ■ 18 LVTTL 50% duty-cycle outputs capable of driving	Original	PDF	LCK4993/LCK4994 Hz--100 LCK4993) Hz--200 LCK4994) DS04-014LCK DS02-346LCK) CY7B993V CY7B994V LCK4993 LCK4994
COC011 Abstract: CY7B993V CY7B994V JESD22-A114 LCK4993V LCK4994 LCK4994V Text: a8e re AdLib OCR Evaluation systems Advance Data Sheet November 2002 LCK4993V/LCK4994V Low-Voltage PLL Clock Drivers Features Description . 12/100 MHz LCK4993V , or 24/200 MHz (LCK4994V) output operation The LCK4993V and LCK4994V low-voltage PLL clock drivers offer user-selectable control over	Original	PDF	LCK4993V/LCK4994V LCK4993V) LCK4994V) LCK4993V LCK4994V DS02-346LCK COC011 CY7B993V CY7B994V JESD22-A114 LCK4994
TSYN01622-3-BAL-DB Abstract: TSWC01622-3-BAL-DB TSWC01622 TSWC02622 TSWC02622-3-BAL-DB TSWC03622 TSWC03622-3-BAL-DB TSYN01622 TSYN03622 Text: Application Note, Revision 1 August 28, 2003 Frequently Asked Questions About TSWC0x622/TSYN0x622 Devices 1 General Question 1. Where can I find more information on the TSWC0x622 and TSYN0x622 devices? Answer: More information, including data sheets and application notes are located on the Agere Systems website:	Original	PDF	TSWC0x622/TSYN0x622 TSWC0x622 TSYN0x622 TSWC01622 AP03-107HSPL-1 TSYN01622-3-BAL-DB TSWC01622-3-BAL-DB TSWC01622 TSWC02622 TSWC02622-3-BAL-DB TSWC03622 TSWC03622-3-BAL-DB TSYN01622 TSYN03622