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    Abstract: No abstract text available
    Text: bSE » • TOGBDBO DDGDlb? 47T « f l U I C L8X12A pASIC 1 FAMILY Very-High-Speed IK 3K Gate CMOS FPGA April 1993 pASIC HIGHLIGHTS .3000 total available gates Q Very-High-Speed, Flexible FPGA Arcliitecture - ViaLink metal-tometal, low-resistance antifuse (<50 ohm) interconnect technology allows


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    QL8X12A

    Abstract: pl68c 96
    Text: L8X12A pASIC 1 FAMILY Very-High-Speed IK 3K Gate CMOS FPGA April 1993 pASIC HIGHLIGHTS RSI Very-High-Speed, Flexible FPGA Architecture - ViaLink metal-tometal, low-resistance antifuse (<50 ohm) interconnect technology allows data path performance over 125 MHz with logic cell delays of under 2.5 ns.


    OCR Scan     		PDF QL8X12A 8-by-12 L8X12A QL8x12A QU1KS002 pl68c 96