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    Panduit Corp PLL-22-PO-1B

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    L O1B Datasheets Context Search

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    Untitled

    Abstract: No abstract text available
    Text: User’s M anual, V1.0, Mar. 2002 TC11IB System Units 3 2 -B i t S i n g l e - C h i p M ic r o co n t ro l l e r M i c r o c o n t ro l le r s N e v e r s t o p t h i n k i n g . Edition 2002-03 Published by Infineon Technologies AG, St.-Martin-Strasse 53,


    Original     		PDF TC11IB D-81541

    Untitled

    Abstract: No abstract text available
    Text: User’s M anual, V1.1, Apr. 2002 TC11IB System Units 3 2 -B i t S i n g l e - C h i p M ic r o co n t ro l l e r M i c r o c o n t ro l le r s N e v e r s t o p t h i n k i n g . Edition 2002-04 Published by Infineon Technologies AG, St.-Martin-Strasse 53,


    Original     		PDF TC11IB D-81541

    smd diode marking LM

    Abstract: 4166 ic equivalent PEB 4165 T ntp 3000 HIGHWAY drv 801 ic MVAM-1 PEB 4166 T PEB31666 PEB3465 PEB4164
    Text: Pr el imi nar y Dat a Sh eet , DS1 , Ju ly 20 00 MuSLIC M u l t i c h a n n e l S u b s c r i b e r L in e Interface Concept PEB 3465 Version 1.2 PEB 31666/31664 Version 1.3 PEB 4166/4164 Version 2.3 W ir e d C o m mu n i ca t io n s N e v e r s t o p t h i n k i n g .


    Original     		PDF D-81541 smd diode marking LM 4166 ic equivalent PEB 4165 T ntp 3000 HIGHWAY drv 801 ic MVAM-1 PEB 4166 T PEB31666 PEB3465 PEB4164

    100313PC

    Abstract: 100313QC 100313QI 100313SC M24B MO-047 MS-013 N24E V28A
    Text: Revised August 2000 100313 Low Power Quad Driver General Description Features The 100313 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 50Ω lines. All


    Original     		PDF 100313SC 24-Lead 100313PC 100313QC 100313QI 100313SC M24B MO-047 MS-013 N24E V28A

    100313QC

    Abstract: No abstract text available
    Text: Revised November 1999 100313 Low Power Quad Driver General Description Features The 100313 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 50Ω lines. All


    Original     		PDF 100313SC 100313PC 100313QC 100313QI

    16-LINE TO 4-LINE PRIORITY ENCODERS

    Abstract: t04 68 3 pin diode t04 68 3 pin transistor EB 36 3C GR "silicon on sapphire" 74 LS 04 Logic Gates cmos dual s-r latch MIL-STD-38510 multiplexers 74 LS 150 transistor T04
    Text: 54HSC/T Series 54HSC/T Series Radiation Hard High Speed CMOS/SOS Logic Replaces May 1995 version, DS3594-3.3 The CMOS/SOS HSC/T Series offer the combined benefits of low power, high speed CMOS with the inherent latch up immunity, Single Event Upset SEU immunity and the high


    Original     		PDF 54HSC/T DS3594-3 54/74LS, DS3594-4 16-LINE TO 4-LINE PRIORITY ENCODERS t04 68 3 pin diode t04 68 3 pin transistor EB 36 3C GR "silicon on sapphire" 74 LS 04 Logic Gates cmos dual s-r latch MIL-STD-38510 multiplexers 74 LS 150 transistor T04

    74F539

    Abstract: MC54 MC74FXXXDW
    Text: MC54/74F539 DUAL 1-OF-4 DECODER WITH 3-STATE OUTPUTS The MC54 / 74F539 contains two independent decoders. Each accepts two Address A0 – A1 input signals and decodes them to select one of four mutually exclusive outputs. A polarity control input (P) determines whether the


    Original     		PDF MC54/74F539 74F539 MC54 MC74FXXXDW

    HD74AC539

    Abstract: Hitachi DSA00333
    Text: HD74AC539 Dual 1-of-4 Decoder with 3-State Output Description The HD74AC539 contains two inpedendent decoders. Each accepts two Address A 0, A1 input signals and decodes them to select one of four mutually exclusive outputs. A polarity control input (P) determines


    Original     		PDF HD74AC539 HD74AC539 Hitachi DSA00333

    SN74LS47N PIN DIAGRAM

    Abstract: IC TTL 7400 diagram and truth table 74lsxxx data sheet 74 LS147 pin configuration layout INTERNAL STRUCTURE LS156 SN74LS47N pin configuration DL121 IC 7400 diagram and truth table philips semiconductor data handbook sn74ls47n counter
    Text: DL121/D Rev. 6, Jan-2000 ON Semiconductor LS TTL Data ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC SCILLC . SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does


    Original     		PDF DL121/D Jan-2000 r14525 DL121 SN74LS47N PIN DIAGRAM IC TTL 7400 diagram and truth table 74lsxxx data sheet 74 LS147 pin configuration layout INTERNAL STRUCTURE LS156 SN74LS47N pin configuration DL121 IC 7400 diagram and truth table philips semiconductor data handbook sn74ls47n counter

    HD74AC539

    Abstract: Hitachi DSA00220
    Text: HD74AC539 Dual 1-of-4 Decoder with 3-State Output ADE-205-398 Z 1st. Edition Sep. 2000 Description The HD74AC539 contains two inpedendent decoders. Each accepts two Address (A 0, A1) input signals and decodes them to select one of four mutually exclusive outputs. A polarity control input (P) determines


    Original     		PDF HD74AC539 ADE-205-398 HD74AC539 Hitachi DSA00220

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6147 U Itra371 28V UltraLogic 3.3V 128-Macrocell ISR™ CPLD • High speed Features — fM a x = 1 2 5 M H z 1 2 8 m a c r o c e l l s in e i g h t l o g i e b l o e k s — t PD = 1 0 n s 3.3V In-System R e p ro g ra m m a b le ISR™ — t s = 5. 5 n s


    OCR Scan     		PDF Itra371 128-Macrocell

    Untitled

    Abstract: No abstract text available
    Text: TT WS128K32-XXX l/l/HITE /MICROELECTRONICS 128 Kx32 SRAM MODULE Organized as 128Kx32; User Configurable as 256Kx16 or FEATURES Commercial, Industrial and M ilitary Temperature Ranges • Access Times of 55 to 120nS 5 Volt Power Supply ■ MIL-STD-883 Compliant Devices Available


    OCR Scan     		PDF WS128K32-XXX 128Kx32; 256Kx16 120nS MIL-STD-883 512Kx8 66-pin, WS128K32-XHX WS128K32-XG4X 01HXX

    z845

    Abstract: TD24 hm4 SMD
    Text: 1. Mechanical Dimensions: 3. E l e c t r i c a l S p e c i f i c a t i o n s : 25°C £0.50 Max □ □ In s e rtio n □ R eturn □ Loss: 1 .OdB Max 1 - 1 0 0 M H z Loss: 18 d B Min, © 1 -3 0 M H Z — 18 d B Min, ®>40MHz — 1 6dB Min, ® 50M H z


    OCR Scan     		PDF 1-100MHz 1-30MHZ 40MHz 50MHz 80MHz -43dB 30MHz 60MHz 100MHz z845 TD24 hm4 SMD

    VEB mikroelektronik

    Abstract: mikroelektronik DDR aktive elektronische bauelemente ddr TESLA Tesla katalog 74c915 V4093D 4502c mosfet 4040BC K561TM2
    Text: DATEN DIGITALER INTEGRIERTER SCHALTKREISE AMATEUR BIBLIOTHEK Klaus K.Streng Streng, Klaus K.: Daten digitaler integrierter Schaltkreise CMOS-Schaltkreise . Berlin: Militirverlag der DDR. 1987. - 192 S.: 314 Bilder (Amateurbibliothek) ISBN 3-327-00360-2 l. Auflage, 1987


    OCR Scan     		PDF HC4316 HC503 4351D/L VEB mikroelektronik mikroelektronik DDR aktive elektronische bauelemente ddr TESLA Tesla katalog 74c915 V4093D 4502c mosfet 4040BC K561TM2

    Untitled

    Abstract: No abstract text available
    Text: D RA W IN G M A D E IN A M E R IC A N PRO JECTIO N NUMBER C-1bb5Qi H USED ON B fl B I H - 'J - . S M i k 7I is : r ^ 7,5*4 i 5,95 \ s I 1 |L J I 1 7 _k u u □ _ D L 5EC TT D N B - R R - £.z4 Ararzs Z M r'n A 0 A/Af£ZK« £ MW /za M M M M ZOOS, M M f/2£ M S


    OCR Scan     		PDF lbb50 1292-H

    information applikation

    Abstract: DL193D information applikation mikroelektronik Mikroelektronik Information Applikation mikroelektronik Heft 12 "Mikroelektronik" Heft mikroelektronik applikation VEB mikroelektronik applikation heft DL192D
    Text: [ H n in k ^ t M E le l- c f a n a n il- c Information Applikatiùn Auf ein Wort: Werte Nutzer dieser Applikations-Hefte! Das Tempo der Entwicklung in der Mikroelektronik erfordert, ständig neue Informationen über Bauelemente und ihre mögliche Anwendung


    OCR Scan     		PDF

    CCDs Charge Coupled Devices

    Abstract: RD13B
    Text: l:2[-’! 05^-16-92 OKI electronic components OPA256C-1_ Self-Scanning Line Sensor GENERAL DESCRIPTION The OPA256C-1 is a 256-bit, one-dimensional diode array comprised of PN junction photodetector diodes and CCDs charge coupled devices). By using a two-phase clock pulse, transfer pulse, and


    OCR Scan     		PDF OPA256C-1 OPA256C-1 256-bit, PA256C-1 RD13BL tiPC159A CCDs Charge Coupled Devices RD13B

    256Kx8bit

    Abstract: No abstract text available
    Text: M4HITE / M IC R O E L E C T R O N IC S WE512K8, WE256K8, WE128K8-XCX 512Kx8 CMOS EEPROM, WE512K8-XCX, SMD 5962-93091 512Kx8 BIT CMOS EEPROM MODULE FEATURES FIG. 1 A18C 1 • Read Access Times of 150, 200, 250, 300ns ■ JEDEC Standard 32 Pin, Hermetic Ceramic DIP Package 300


    OCR Scan     		PDF WE512K8, WE256K8, WE128K8-XCX 512Kx8 WE512K8-XCX, 300ns MIL-STD-883 Re128Kx8 512Kx 256Kx8bit

    Untitled

    Abstract: No abstract text available
    Text: This is a partial data sheet. For complete data sheet, see Section 8, Modules. CYM1624 CYPRESS SEMICONDUCTOR 6 4 K x l 6 SRAM Module Features Functional Description • High-density X-megabit SRAM module T h e CY M 1624 is a very high perform ance 1-m egabit static R A M m odule organized


    OCR Scan     		PDF CYM1624 i1611 CYM1622 i/o13 1624PV-25 1624PV-35 1624PV-4S

    Untitled

    Abstract: No abstract text available
    Text: N R S 2 3 2 C L I N E J U 6 4 1 B D R I V E R / R E C E I V E R GENERAL DESCRIPTION The NJU6401B is a RS232C line driver/receiver compos­ ed of 3 drivers and 5 receivers. The drivers convert the input of TTL level signals into RS232C level signals and limit the slew rate below


    OCR Scan     		PDF NJU6401B RS232C RS-232C NJU6401BD NJU6401BM NJU6401B

    Untitled

    Abstract: No abstract text available
    Text: t t W MS256K16-XDLX WHITE / M I C R O E L E C T R O N I C S 256Kx16 MONOLITHIC SRAM, SMD 5962-96902 pending PRELIMINARY * FEATURES • Access Times 17, 20, 25, 35nS Data I/O Compatible w ith 3.3V devices ■ MIL-STD-883 Com pliant Devices A vaila b le 2V M inim um Data Retention for battery back up operation


    OCR Scan     		PDF MS256K16-XDLX 256Kx16 MIL-STD-883 256Kx16 256K16 01HXX' 03HXX' 256KX

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHICÍIICMPTR/MIPRC .-O LIE D • b24Tfl2ö Q G 1 7 h S 3 SSb « M i m V M ITSU BISH I L S u M33241GS CM OS D IR E C T M EM ORY A C C E S S CONTROLL.ER M 32/DM AC) DESCRIPTION M33241GS(M32/DMAC) It a hlgh-lunctlon, high-perform­ ance 32-blt direct memory a c c e u controller that accesses


    OCR Scan     		PDF b24Tfl2Ã M33241GS 32/DM M33241GS M32/DMAC) 32-blt -L0436-A KI-B103

    2N4116

    Abstract: 2N5076 2N5006 2N5008 2N5288 2N5289 2N5317 2N5319 2N5731 2N5957
    Text: NEW E N G L A N D S E M I C O N D U C T O R STE D • b5b4^3 OOODOSfi DAT * N E S 3 VCEO SUS (V) 1C (MAX) W - / NPN TO-61 = 10-20A VcEO(SUS) = 8 0-1 00V fT = 10-50 MHz lc (M A X ) Type No. 3 ISOLATED COLLECTOR Case 8 0 6 tlFE 0 IC/VCE (mln-max @ A/V) VCE (SAT)


    OCR Scan     		PDF 0-20A 0-100V 2N5006 2N5008 2N5288 2N5289 2N5284 2N5285 2N5346 2N5347 2N4116 2N5076 2N5006 2N5008 2N5288 2N5289 2N5317 2N5319 2N5731 2N5957

    Untitled

    Abstract: No abstract text available
    Text: O K I Semiconductor M S M 5 6 V 1 6 4 0 0 2-Bank x 2,097,152-Word x 4-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTIO N The MSM56V16400 is a 2-bank x 2,097,152-word x 4-bit synchronous dynamic RAM, fabricated in OKI's CMOS silicon gate process technology. The device operates at 3.3 V. The inputs and


    OCR Scan     		PDF 152-Word MSM56V16400 cycles/64