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    146R

    Abstract: 146R-J 146R-W 41KD
    Text: AT&T Data Sheet 146R Interrupt Holding Register Features • Up to four interrupt inputs per interrupt holding register ■ Cascadable inputs and outputs for expansion ■ Interfaced on either l/O-instructed or memorymapped basis ■ Convenient interface signals: AO, A1, E, IOR,


    OCR Scan     		PDF RS42898 J32562 DS87-315DBIP 146R 146R-J 146R-W 41KD

    3055 7F

    Abstract: j325 129CD
    Text: AT&T i Data Sheet 129CD Quintuple Static Shift Register Features Vcc • Five 32-bit static shift registers ' 20 kß ■ 5.0 ± 0.5 V power supply: 250 mW max ■ TTL-com patible input/output ■ Single-phase clock, positive-edge triggered INPUT AND CLOCK PINS '


    OCR Scan     		PDF 129CD 32-bit 24-pin RS42898 J32562 DS87-317DBIP 3055 7F j325

    DS1E

    Abstract: DS-873
    Text: 630AJ R eceive C o n v e rte r » Features • Data lo o p b a ck mode ■ Internal phase-locked loop ■ A utom atic o u tp u t shutdow n ■ U n ipolar clo ck o utp ut ■ D ual-rail PCM o u tp u t ■ TTL-com patible o utput Description The 630AJ Receive Converter hybrid integrated circu it HIC extracts clo ck and PCM inform ation


    OCR Scan     		PDF 630AJ 20-pin D-8000 RS42898 J32562 DS87-320SMQS DS1E DS-873

    YD 8287

    Abstract: we32100
    Text: Data Sheet T7110 Synchronous Protocol Data Formatter with Serial Interface Features Host Interface Features • Compatible with AT&T’s WE 32100 Microprocessor and with Intel’s iAPX86 and Motorola’s MC68000 microprocessor series ■ On-chip 16-channel DMA memory address


    OCR Scan     		PDF T7110 iAPX86 MC68000 16-channel CCITT-16 048-Mb/s 096-Mb/s J32562 DS87-282SM YD 8287 we32100

    DSP16A

    Abstract: WE DSP16A dsp16a user guide we dsp32 at&t dsp dsp32c G010343 XWXX "saturation value" xlxxx
    Text: A T & T HELEC I C bME D • D D S D O S b D D 1 0 32 7 77^ M A T T E INTRODUCTION Architecture 1. INTRODUCTION The WE DSP16A Digital Signal Processor is a 16-bit, high-performance, CMOS integrated circuit. This device can be programmed to perform a wide variety of signal-processing functions. This is the DSP


    OCR Scan     		PDF 005002b DSP16A 16-bit, 16-bit 36-bit WE DSP16A dsp16a user guide we dsp32 at&t dsp dsp32c G010343 XWXX "saturation value" xlxxx

    Untitled

    Abstract: No abstract text available
    Text: AT&T Product Announcement ATE-Series Digital Bipolar G ate Arrays AT&T Microelectronics is introducing a new series to the family of existing custom gate arrays. The customized high-speed TTL-ECL gate arrays are designed using Scaled-Fast OxideIsolated Logic SFOXIL bipolar


    OCR Scan     		PDF ATE6000, ATE3000, ATE1000 ATE1000 ATE3000 ATE6000 149-pin PN88-05DBIP

    ic 555 timer IR remote control TRANSMITTER AND RE

    Abstract: T7100A-BC
    Text: T7100A X.25 Protocol Controller Features • 5-M Hz clock max ■ Triple-channel DMA with standard interface ■ 250-kb/s serial data rate (max) ■ Programmable retransmission counter (N2) ■ 8-bit data bus ■ Password exchange mechanism for dial-up operation


    OCR Scan     		PDF T7100A 250-kb/s 16-bit mechan372-2447 D-8000 RS42898 J32562 DS88-44SMOS ic 555 timer IR remote control TRANSMITTER AND RE T7100A-BC

    LS259

    Abstract: TPD10-TPD9 DS8815
    Text: AT&T Preliminary Data Sheet T7200 Multi-Port Repeater Unit Controller Features Functionally conforms to IEEE 802.3 CSMA/CD specifications 12-port repeater: 11 twisted-pair, 1 AUI Automatic preamble generation APG to minimize bit loss Manchester encoding of transmitted data


    OCR Scan     		PDF T7200 12-port D-8043 J32562 DS88-78SMOS LS259 TPD10-TPD9 DS8815

    KD 502

    Abstract: 146R 41KD 41KD-J 41KD-W ATT 41kd
    Text: 41 K D Interrupt Holding R e gister Features • Up to four interrupt inputs per interrupt holding register Masking and interrupt registers may be read or written to verify operational integrity ■ Cascadable inputs and outputs for expansion TTL/CMOS-compatible


    OCR Scan     		PDF D-8000 RS42898 J32562 DS87-316DBIP KD 502 146R 41KD 41KD-J 41KD-W ATT 41kd

    Untitled

    Abstract: No abstract text available
    Text: fpAfcT Data Sheet 146R Interrupt Holding R egister Features • Up to four interrupt inputs per interrupt holding register ■ Cascadable inputs and outputs for expansion ■ Interfaced on either l/O-instructed or memorymapped basis ■ Convenient interface signals: AO, A1, E, IOR,


    OCR Scan     		PDF RS42898 J32562 146R-J 146R-W 18-Pin 20-Pin DS87-315DBIP

    define RELAY DRIVER

    Abstract: relay CMOS technology sn75437
    Text: LC1107AC Quad Relay/Peripheral Driver Features • Standard +5 V supply operation ■ High current capability: 150 mA per driver, 600 mA total ■ Built-in flyback protection for inductive loads ■ Outputs can be tied together for increased current capability


    OCR Scan     		PDF LC1107AC SN75437, UDN2541B, DS3658 16-pin tha-553-2448 D-8000 J32562 DS87-319SMOS define RELAY DRIVER relay CMOS technology sn75437

    DSP3210

    Abstract: DSP32C AT&T dsp32 DSP32 Floating-Point Arithmetic at&t dsp dsp32 att 3d graphics IS3938 motorola idp
    Text: A T & T MELEC I C b4E » • 005002b DDlDflME STT ■ ATT2 DSP3210 Information Manual Introduction 1. INTRODUCTION The AT&T DSP3210 brings the power of floating-point signal processing to personal computers and workstations opening a wide range of multimedia applications. From its conception, the DSP3210 has been engineered with a


    OCR Scan     		PDF 005002b 0010flM2 DSP3210 DSP32C 16-bit, 32-bit AT&T dsp32 DSP32 Floating-Point Arithmetic at&t dsp dsp32 att 3d graphics IS3938 motorola idp

    Untitled

    Abstract: No abstract text available
    Text: AT&T Data Sheet T7260 and T7261 ISDN U-lnterface Basic Access Transceiver Chip Set Features • U -interface fo r 2-wire operation ■ Pin-selectable fo r central office CO sw itch and netw ork term ination (NT) a pp lica tio n s ■ A daptive equalization and a utom atic gain


    OCR Scan     		PDF T7260 T7261 J32562 DS88-26SMOS

    we32100

    Abstract: 0TE15
    Text: Data Sheet T7102A-X.25/X.75 Protocol Controller Features • 24-bit address bus to address a 16-Mbyte address space ■ Independently programmable transmit and receive window size ■ Dual-channel DMA with standard interface, including DMA request, DMA acknowledge,


    OCR Scan     		PDF T7102A-X 24-bit 16-Mbyte modulo-128 16-bit 32-bit J32562 DS87-84SMOS we32100 0TE15

    Untitled

    Abstract: No abstract text available
    Text: T7001 Random Number Generator Features On-chip or external high-frequency oscillator source option On-chip or external jitter oscillator source option Data ready and alarm output flags readable from the data bus or independent output pins, allowing either processor interrupt or


    OCR Scan     		PDF T7001 536-bit D-8000 RS42898 J32562 DS88-43SMOS

    LS373

    Abstract: 41KP LS164 ATT 41 fukoku
    Text: AT&T Data Sheet 41 KP L atch ed S erial R eg ister Benefits Synchronous data transfers • Combines functions of the LS373 and LS164 devices on a single chip Useful as input or output port for microprocessors ■ Cost and space saving TTL and CMOS compatible


    OCR Scan     		PDF LS373 LS164 J32562 DS88-88DBIP 41KP ATT 41 fukoku

    j325

    Abstract: eel -16-2005 3055 7F ATE1000 ATE3000 ATE6000 ttl buffer ATT Microelectronics
    Text: Product Announcement ! AT&T ATE-Series D igital Bipolar G ate Arrays AT&T Microelectronics is introducing a new series to the family of existing custom gate arrays. The customized high-speed TTL-ECL gate arrays are designed using Scaled-Fast OxideIsolated Logic SFOXIL bipolar


    OCR Scan     		PDF ATE6000, ATE3000, ATE1000 D-8000 RS42898 J32562 PN88-05DBIP j325 eel -16-2005 3055 7F ATE3000 ATE6000 ttl buffer ATT Microelectronics

    Untitled

    Abstract: No abstract text available
    Text: 41LF Quad Differential Line Receiver Features • Pin-equivalent to the general-trade AM26LS32 device, with improved speed and reduced power consumption ■ Four line receivers per package ■ Meets ESDI Standards ■ Complementary inputs for each line receiver


    OCR Scan     		PDF AM26LS32 D-8000 RS42898 J32562 DS87-323DBIP

    KD 502

    Abstract: KD 3055 146R 41KD 41KD-J 41KD-W ATT Microelectronics
    Text: i Data Sheet AT&T 4 1 KD In terru p t Holding R eg ister Features Up to four interrupt inputs per interrupt holding register Masking and interrupt registers may be read or written to verify operational integrity Cascadable inputs and outputs for expansion


    OCR Scan     		PDF RS42898 J32562 DS87-316DBIP KD 502 KD 3055 146R 41KD 41KD-J 41KD-W ATT Microelectronics

    DSP3210

    Abstract: DSP32C
    Text: A T & T MELEC I C b4E » • 005002b DDlDflME STT ■ ATT2 DSP3210 Information Manual Introduction 1. INTRODUCTION The AT&T DSP3210 brings the power of floating-point signal processing to personal computers and workstations opening a wide range of multimedia applications. From its conception, the DSP3210 has been engineered with a


    OCR Scan     		PDF 005002b DSP3210 DSP32C 16-bit, 32-bit ior12

    DS-873

    Abstract: No abstract text available
    Text: AT&T Data Sheet 129CD Q uintuple S tatic Shift R egister vcc Features • Five 32-bit static shift registers • 20 kfi ■ 5.0 ± 0.5 V power supply: 250 mW max ■ TTL-compatible input/output ■ Single-phase clock, positive-edge triggered INPUT AND CLOCK PINS '


    OCR Scan     		PDF 129CD 32-bit 24-pin RS42898 J32562 DS87-317DBIP DS-873

    Untitled

    Abstract: No abstract text available
    Text: Advance Data Sheet WE DSP16A Digital Signal Processor Description The WE DSP16A Digital Signal Processor is a 16-bit high-speed programmable integrated circuit. The device is fabricated in low-power CMOS technology and is packaged in an 84pin plastic leaded chip carrier. The DSP16A


    OCR Scan     		PDF DSP16A 16-bit 84pin DSP16A 36-bit 32-bit D-8000 RS42898

    Untitled

    Abstract: No abstract text available
    Text: \ '• AKT Data Sheet T7000A Digital Encryption Processor Features ■ Programmable DES ciphering modes q Electronic codebook ECB o Cipher block chaining (CBC) a 1-, 8-, or 64-bit cipher feedback (CFB) ° Output feedback (OFB) ■ Ciphering rates of 235,000 operations/s for


    OCR Scan     		PDF T7000A 64-bit RS42898 J32562 DS88-47SM0S

    Untitled

    Abstract: No abstract text available
    Text: AT&T Preliminary Data Sheet ATE2000 Series Gate Array Description The ATE2000 High-Speed Gate Array is a member of the customized TTL-ECL gate array family and is designed using advanced Scaled Fast Oxide Isolated Logic SFOXIL Bipolar technology. The device


    OCR Scan     		PDF ATE2000 84-lead J32562 DS88-170DBIP