cpu schematic
Abstract: 82385 t1ts MECL System Design Handbook AP-442 f245 motorola 386DX EDN handbook cmos disadvantages 74AS646
Text: AP-442 APPLICATION NOTE 33 MHz 386 System Design Considerations SHAHZAD BAQAI KIYOSHI NISHIDE May 1990 Order Number 240725-001 Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in
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Original
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AP-442
IE-34
cpu schematic
82385
t1ts
MECL System Design Handbook
AP-442
f245 motorola
386DX
EDN handbook
cmos disadvantages
74AS646
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PDF
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motorola mecl system design handbook
Abstract: MECL System Design Handbook f245 motorola 82385 74AS08 cpu schematic H124 BF245 SE 442 386 cpu
Text: AP-442 APPLICATION NOTE 33 MHz 386 System Design Considerations SHAHZAD BAQAI KIYOSHI NISHIDE May 1990 Order Number 240725-001 Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in
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Original
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AP-442
IE-34
motorola mecl system design handbook
MECL System Design Handbook
f245 motorola
82385
74AS08
cpu schematic
H124
BF245
SE 442
386 cpu
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PDF
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Untitled
Abstract: No abstract text available
Text: UNITE» MICROELECTRONICS UM82C388 3QE D • ^355655 DOD01 fab 1 5^-33 ^ \ INTEL Cache Interface Features ■ Supports 16 MHz, 20 MHz and 25 MHz Intel 80386 Supports 2 5 6 K and 1M DRAM S ■ Supports 25 MHz 80386 with 82385 cache controller 1.2/it CMOS technology
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UM82C388
DOD01
120ns
CAS11
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PDF
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Untitled
Abstract: No abstract text available
Text: SN74ACT2140A 2-WAY 4K x 18/8K x 18 CACHE DATA RAM D3291, NOVEMBER 1989-REVISED JUNE 1990 • Interfaces Directly with the Intel 82385 Cache Controller • Access Time . . . 25 ns Max FN PA C K A G E TOP V IE W z • • • I Fast Access Time Supports 33-MHz Intel
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SN74ACT2140A
18/8K
D3291,
1989-REVISED
33-MHz
D8-D15,
A0-A11
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Untitled
Abstract: No abstract text available
Text: KAVX /a \va ' K yD C ERa 3Ô6-HC Series Crystal Clock Oscillators for Intel 80386 i80386 C o m p a tib le / • 2 4 , 3 2 , 4 0 , 50 M H z FEATURES HOW TO ORDER 1 World’s only clock oscillator specifically designed to meet the rigorous timing demands of the Intel 80386
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i80386
150pF
386-HC1
32MHz,
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82385
Abstract: TAG 9223 80386 80386 microprocessor pin out diagram c3851 CA9H cache controller C385 80386 specification update SA31-SA2
Text: m r 30 isst í MDS-C385Ì 32kB 32-BIT CACHE CONTROLLER MATRA DESIGN SEMICONDUCTOR nmm&wry/ July 1990 FEATURES Compatible with Intel 82385 32-bit Write-thru scheme for updating main cache controller memory, including posted write Highly integrated and optimized for
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MDS-C385Ã
32-BIT
82385
TAG 9223
80386
80386 microprocessor pin out diagram
c3851
CA9H
cache controller
C385
80386 specification update
SA31-SA2
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PDF
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cache memory OF intel 80386
Abstract: intel 82385 intel 80386 pin diagram 82385 80386
Text: M OSEL APPLICATION NOTE AN-1 Using the MOSEL MS82C308 Cache Data RAM with the Intel 82385 Cache Controller High speed 80386 systems place severe demands on memory designers to develop economical methods to maintain processor throughput without incurring enormous costs. One proven, effective
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MS82C308
MS82C308
cache memory OF intel 80386
intel 82385
intel 80386 pin diagram
82385
80386
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256K x 8 SRAM dip
Abstract: No abstract text available
Text: ADVANCE MT5C6416 M IC R O N SRAM 4K 16 SRAM X LATCHED CACHE DATA RAM FEATURES PIN ASSIGNMENT Top View • On-chip address latch. • Compatible with the Intel 82385 cache memory controller. • Fast access times: 25ns, 35ns and 45ns. • Upper and lower byte selects.
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MT5C6416
256K x 8 SRAM dip
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PDF
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transistor marking A9
Abstract: 82385 D016 "256K x 16" SRAM PLCC
Text: ADVANCE I^ IIC R O N M T5C 6416 SRAM 4K 16 SRAM X LATCHED CACHE DATA RAM FEATURES PIN ASSIGNMENT Top View • On-chip address latch. • Compatible with the Intel 82385 cache memory controller. • Fast access times: 25ns, 35ns and 45ns. • Upper and lower byte selects.
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MT5C6416
transistor marking A9
82385
D016
"256K x 16" SRAM PLCC
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80385
Abstract: pipeline architecture for 80386 82C385 intel 80386 pin diagram intel 80386 block diagram MARKING T174 bus ARCHITECTURE OF 80386 data bus, control bus intel 80386 bus architecture MDS-C385I 82335 intel
Text: 82C385 32kB 32-BIT CACHE CONTROLLER MATRA W B JULY 1989 FEATURES o Compatible with Intel 82335 32-bit Wrtte»thru scheme for updating main cache controller memory, Including posted write Highly integrated and optimized for 386 Bus snooping for maintaining coher
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82C385
32-BIT
80385
pipeline architecture for 80386
82C385
intel 80386 pin diagram
intel 80386 block diagram
MARKING T174
bus ARCHITECTURE OF 80386 data bus, control bus
intel 80386 bus architecture
MDS-C385I
82335 intel
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PDF
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cache memory OF intel 80386
Abstract: 82385 Unicorn Microelectronics intel 80286 video pa10 PA10 PA11 PA12 PA13 PA15
Text: UNICORN MICROELECTRONICS WZ D • _ _ LJfyiigsg_ I ^270730 GGOOflTE .7 ■ UM82C388 Intel Cache Interface General Description The UM82C388 is one of the UMC High End AT HEAT Chip Set. It provides memory control functions which facilitate wide ranges of DRAM and CPU speed
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T27fi7afl
UM82C388
UM80386
16MHz,
20MHz
25MHz
120ns
UM82C388
cache memory OF intel 80386
82385
Unicorn Microelectronics
intel 80286
video pa10
PA10
PA11
PA12
PA13
PA15
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PDF
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82C307
Abstract: 82385 80386 cache 79R3000 UM61166 UM61166-25 UM61166L 82c307 cache controller 80386 intel cache controller
Text: UNICORN MICROELECTRONICS E4E D =1270700 □□□115b 5 r - w Ü M - z z - i o . U M 61166 Series O 4KX16 CMOS CACHE RAM P R E L IM IN A R Y Features Common I/O using three-state output Direct interface with Intel cache controller 82385 or IDT 79R3000 RISC CPU or C & T cache controller
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/af858Â
r-M-22-10.
4KX16
UM61166
UM61166-25
UM61166L-25
44LPLCC
UM61166-35
UM61166L-35
82C307
82385
80386 cache
79R3000
UM61166L
82c307 cache controller
80386
intel cache controller
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PDF
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SCAD002
Abstract: No abstract text available
Text: SN74ACT2140A 2-WAY 4K x 18/8K x 18 CACHE DATA RAM D3291, NO VEM BER 1 989-R E V IS E D JUNE 1990 FN PACKAGE Interfaces Directly with the Intel 82385 Cache Controller TOP VIEW 2 Access T im e . . . 25 ns Max CM CO Tf LO <0 O O LU J N CO o 0 ) t- T- r- < AO
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SN74ACT2140A
18/8K
D3291,
989-R
33-MHz
D8-D15,
A0-A11
SCAD002
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intel 82385
Abstract: 82386 20D11 21G22
Text: SN74ACT2140A 2-WAY 4K x 18/8K x 18 CACHE DATA RAM D3291, N O VEM BER 1989-R E V IS E D JUN E 1990 FN P ACKA G E Interfaces Directly with the Intel 82385 Cache Controller TOP VIE W T - C M C O T j-in tO I II II 6 II 5 AO ] 8 7 GND ] 9 Configurable for 2-Way or Direct Mapped
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SN74ACT2140A
18/8K
D3291,
1989-R
33-MHz
64K-Byte
ACT2140A
intel 82385
82386
20D11
21G22
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hitachi ic 29050 h
Abstract: 0/hitachi ic 29050 h semiconductor cross reference
Text: SEMI-CONDUCTOR Cross Reference AMD Device P/N RNP/N Fujitsu P/N RNP/N Intel P/N A M 29030 P G A -1 46C H 3-S B500 PG A -064A H 3-S P 54C A M 29117 P G A -0 68C H 3-S B2000 P G A -135A H 3-S i860 i486 A M 29325 PG A-145AH 3-5 C440H PG A -064A H 3-S AM 29331
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-064A
B2000
-135A
-145AH
C440H
-120B
-169B
hitachi ic 29050 h
0/hitachi ic 29050 h
semiconductor cross reference
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PDF
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80386
Abstract: Intel 82077 intel 80386sx intel 82310 82310 intel 80387sx
Text: intéT 82311 HIGH INTEGRATION Micro Channel COMPATIBLE PERIPHERAL CHIP SET High Integration VLSI Components to Implement Micro C h a n n e l Compatible Motherboard Single Architectural Solution for 80386 16 MHz, 20 MHz and 25 MHz Systems and 80386SX 16 MHz Systems
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80386SX
80386
Intel 82077
intel 80386sx
intel 82310
82310
intel 80387sx
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386 MOTHERBOARD
Abstract: MOTHERBOARD Chip Level MANUAL INTEL MOTHERBOARD Chip Level MANUAL 386 MOTHERBOARD vga cpu 386 82307 intel 82311 intel 82308 82308 VLSI 386
Text: intei 82311 HIGH INTEGRATION Micro Channel COMPATIBLE PERIPHERAL CHIP SET Flexible Memory Architecture Support — Up to 4 Banks of Interleaved Page Memory — 256K, 1M, 4M DRAM Support High Integration VLSI Components to Implement Micro Channel Compatible
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82077AA
387TM
132-Pin
386 MOTHERBOARD
MOTHERBOARD Chip Level MANUAL
INTEL MOTHERBOARD Chip Level MANUAL
386 MOTHERBOARD vga
cpu 386
82307
intel 82311
intel 82308
82308
VLSI 386
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PDF
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intel 82310
Abstract: 82310 intel 80387sx intel 80386 motherboard,
Text: in te T 82310 Micro Channel COMPATIBLE PERIPHERAL CHIP SET • Highly Integrated VLSI Components to Implement Micro Channel Compatible Motherboard ■ Single Architectural Solution for 80386 16 MHz, 20 MHz and 25 MHz systems, and 80386SX 16 MHz Systems
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80386SX
intel 82310
82310
intel 80387sx
intel 80386 motherboard,
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80486 microprocessor features
Abstract: 82C482 A38202 V63C430 82c31 pin out of 80386 microprocessor
Text: i f VITELIC V63C430 2 x 8 K x 16 BIT/16K x 16 BIT CACHE CMOS STATIC RAM ‘ Features PRELIMINARY Description Designed for 64KB, 128KB, and 256KB implementation Direct interface to 82385, A38202, C395e, 82C482 and 82C312 Cache Controllers High Speed • Designed for 80386 and 80486 systems up to
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V63C430
BIT/16K
128KB,
256KB
A38202,
C395e,
82C482
82C312
80486 microprocessor features
A38202
82c31
pin out of 80386 microprocessor
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PDF
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V63C328
Abstract: pin configuration of intel 80386 82385 cache memory OF intel 80386 intel 82385
Text: IS" T VITELIC V63C328 HIGH PERFORMANCE, LOW POWER 8K x 16 BIT CACHE CMOS STATIC RAM Features Description • High speed • Designed for 80386 Systems up to 33/25/20 MHz • Directly interfaces with 82385 Cache Controller • Maximum access time of 30/40/45 ns
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V63C328
32-bit
500mV
V63C328
pin configuration of intel 80386
82385
cache memory OF intel 80386
intel 82385
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PDF
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Untitled
Abstract: No abstract text available
Text: ADVANCE M IC R O N M T 5 6C 0 41 6 DUAL 4Kx 16/18 SRAM, SINGLE 8Kx 16/18 CACHE DATA STATIC RAMS CONFIGURABLE CACHE DATA RAM FEATURES PIN ASSIGNMENT Top View • Operates as two 4K x 16/18 SRAMs with common addresses, common data and separate control signals.
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52-Pin
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82385
Abstract: micron memory sram cache micron memory sram intel 82385 74LS373 A12 marking intel sram MT56C0416 1638C 1.2 Micron CMOS Process Family
Text: ADVANCE M IC R O N MT56C0416 DUAL 4Kx 16/18 SRAM, SINGLE 8Kx 16/18 CACHE DATA STATIC RAMS CO NFIGURABLE CACHE DATA RAM FEATURES PIN A SS IG N M E N T Top View • Operates as two 4K x 16/18 SRAMs with common addresses, common data and separate control signals.
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MT56C0416
MT56C0416
82385
micron memory sram cache
micron memory sram
intel 82385
74LS373
A12 marking
intel sram
1638C
1.2 Micron CMOS Process Family
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PDF
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IDT71586
Abstract: No abstract text available
Text: CMOS STATIC RAM 6 4 K 4 K x 16-BIT LATCHED CacheRAM IDT 71586 FEATURES: DESCRIPTION: • Wide 4K x 16 Organization The IDT71586 is a fast 4K x 16 latched address CMOS static RAM designed to enhance cache memory designs. This device of fers improved circuit board densities overdesigns using traditional
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16-BIT)
IDT71586
82C307,
IDT79R3000
MIL-STD-883,
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7 segment display using 8086
Abstract: intel 82230 80287XL 80C88A
Text: my* NAME:. _ _ _ :_ •l^A M COMPANY: -wf, ADDRESS: CITY: f ZIP: STATE: COUNTRY: PHONE NO.: Chi 'H'-'- ORDER NO. YV TITLE TTTTT" r r n n .i i t i 1 1 T l 1" ! i QTY. PRICE i X - X . 1 1 1 1 I I I
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01f-27f2-8O3-7l68O
2-71979T8
7 segment display using 8086
intel 82230
80287XL
80C88A
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PDF
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