LVCH162501A
Abstract: SO56-2 idt74lvch162501a
Text: IDT74LVCH162501A 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER W/ 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT IDT74LVCH162501A REGISTERED TRANSCEIVER ADVANCE WITH 3-STATE OUTPUTS, INFORMATION 5 VOLT TOLERANT I/O, BUS-HOLD FEATURES: –
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IDT74LVCH162501A
18-BIT
18-BIT
250ps
MIL-STD-883,
200pF,
635mm
O56-1)
SO56-2)
LVCH162501A
SO56-2
idt74lvch162501a
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Untitled
Abstract: No abstract text available
Text: 3.3V CMOS 18-BIT REGISTERED TRANSCEIVER WITH 5 VOLT TOLERANT I/O IDT74LVCH16501A IDT74LVCH162501A IDT74LVC16501A ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: These 18-bit registered transceivers are built using ad vanced dual metal CMOS technology. These high-speed, low
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18-BIT
IDT74LVCH16501A
IDT74LVCH162501A
IDT74LVC16501A
18-bit
atVCH16501
IDT74LVCH162501
IDT74LVC162501A
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Untitled
Abstract: No abstract text available
Text: IDT74LVCH162501A 3.3V CMOS 18-BIT ADVANCE REGISTERED TRANSCEIVER INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD FEATURES: - low power 18-bit registered bus transceiver combines D-type latches and D-type flip-flops to allow data flow in transparent,
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OCR Scan
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PDF
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IDT74LVCH162501A
18-BIT
250ps
MIL-STD-883,
200pF,
635mm
|
Untitled
Abstract: No abstract text available
Text: 3.3V CMOS 18-BIT IDT74L VCH162501A REGISTERED TRANSCEIVER ADVANCE WITH 3-STATE OUTPUTS, INFORMATION 5 VOLT TOLERANT I/O, BUS-HOLD FEATURES: - Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
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OCR Scan
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PDF
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18-BIT
IDT74L
VCH162501A
250ps
MIL-STD-883,
200pF,
635mm
LVCH162501A
48-Pin
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