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    Festo EAMG-U1-70

    COUNTER BEARING
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    Arrow Hart SGU175

    supp Grip Stnd Clsd Lock Bale 1.75-1.99 | Arrow Hart SGU175
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    Festo EAMG-U1-70 (ALTERNATE: 2598638)

    Counter Bearing, sz 70, max speed 5000 1/min | Festo EAMG-U1-70
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    GU17 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    cdb 4121 e

    Abstract: cdb 4121 ARMv7 Cortex-m1 verilog code AHB cortex
    Text: Cortex-M1 v3.1 Handbook 2010 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 50200127-12 Release: September 2010 No part of this document may be copied or reproduced in any form or by any means without prior written consent of


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    PDF

    AC270

    Abstract: verilog code for slave SPI with FPGA spi slave AFS090
    Text: Application Note AC270 SPI Flash Emulation for Fusion Devices Design Example Contents General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .


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    AC270 AC270 verilog code for slave SPI with FPGA spi slave AFS090 PDF

    RT3PE600L

    Abstract: RT3PE3000L AES-128 PAC10 LG484 ProASICPLUS Flash Family FPGAs Advanced v0.1
    Text: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging


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    MIL-STD-883 RT3PE600L RT3PE3000L AES-128 PAC10 LG484 ProASICPLUS Flash Family FPGAs Advanced v0.1 PDF

    AC307

    Abstract: SPARTAN 3E STARTER BOARD L262144 memory 2114 XILINX/SPARTAN 3E STARTER BOARD AFS090 generic SPI AFS-EVAL
    Text: Application Note AC307 Configuring SRAM FPGAs Using Actel Fusion Introduction Due to the nature of SRAM technology, SRAM-based FPGAs are volatile and lose their configuration when powered off, so they must be reconfigured at every power-up. Hence, almost every system using SRAMbased FPGAs contains an additional nonvolatile memory, such as flash PROM or EEPROM, to store the


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    AC307 AC307 SPARTAN 3E STARTER BOARD L262144 memory 2114 XILINX/SPARTAN 3E STARTER BOARD AFS090 generic SPI AFS-EVAL PDF

    LTM4062

    Abstract: CORE8051 ADC DAC Verilog 2 bit Implementation AC321
    Text: Application Note AC321 Using Fusion for Closed-Loop Power Supply Margining Overview A growing number of embedded systems designers want the ability to dynamically alter the precise value of a power supply's voltage. Closed-loop power supply margining is a technique whereby a power rail is


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    AC321 LTM4062 CORE8051 ADC DAC Verilog 2 bit Implementation AC321 PDF

    ACTEL FUSION AFS1500

    Abstract: FlashPro3 PQ208 QN108 QN180 M1AFS1500 AFS250 rc oscillator M-LVDS
    Text: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator


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    130-nm, 128-Bit ACTEL FUSION AFS1500 FlashPro3 PQ208 QN108 QN180 M1AFS1500 AFS250 rc oscillator M-LVDS PDF

    Advanced Boot Block Flash

    Abstract: AES-128 CS201 CS281 CS289 AGLP125
    Text: v1.5 IGLOO PLUS Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode


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    130-nm, Advanced Boot Block Flash AES-128 CS201 CS281 CS289 AGLP125 PDF

    A3P600

    Abstract: A3P060 A3P1000 A3P125 A3P250 AECQ100 AEC-Q100 FG144 FG256 FG484
    Text: v1.0 Automotive ProASIC3 Flash Family FPGAs Features and Benefits Low Power • 1.5 V Core Voltage • Support for 1.5-V-Only Systems • Low-Impedance Flash Switches High-Temperature AEC-Q100–Qualified Devices • Grade 2 105°C TA 115°C TJ • Grade 1 125°C TA (135°C TJ)


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    AEC-Q100 A3P600 A3P060 A3P1000 A3P125 A3P250 AECQ100 FG144 FG256 FG484 PDF

    A3PE3000L FG484

    Abstract: Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y
    Text: v1.3 ProASIC3L Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for


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    130-nm, A3PE3000L FG484 Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y PDF

    QN68

    Abstract: VQ100 actel part markings
    Text: Advance v0.4 ProASIC®3 nano Flash FPGAs Features and Benefits Advanced I/Os Wide Range of Features • 10 k to 250 k System Gates • Up to 36 kbits of True Dual-Port SRAM • Up to 71 User I/Os Reprogrammable Flash Technology • • • • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS Process


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    130-nm, 128-Bit QN68 VQ100 actel part markings PDF

    CORE8051

    Abstract: FlashPro3 AES-128 FG256 PQ208 ac motor variable speed control rc oscillator
    Text: Preliminary v0.4 Actel Fusion Mixed-Signal FPGA for the MicroBlade Advanced Mezzanine Card Solution Features and Benefits • Targeted to Advanced Mezzanine Card AdvancedMC Designs • Designed in Partnership with MicroBlade • 8051-Based Module Management Controller (MMC)


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    8051-Based 130-nm, 32ost CORE8051 FlashPro3 AES-128 FG256 PQ208 ac motor variable speed control rc oscillator PDF

    Untitled

    Abstract: No abstract text available
    Text: CoreRemap Product Summary Contents Intended Use • General Description . Connecting CoreRemap in CoreConsole . Programmer’s Model . Resource Requirements .


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    PDF

    verilog hdl code for matrix multiplication

    Abstract: vhdl code for pipelined matrix multiplication vhdl code hamming verilog code for matrix multiplication vhdl code for matrix multiplication vhdl code hamming edac memory Core from Libero verilog code hamming hamming code FPGA vhdl coding for hamming code
    Text: Application Note AC319 Using EDAC RAM for RadTolerant RTAX-S/SL and Axcelerator FPGAs Applies to EDAC Core from Libero IDE v7.2 and Newer Introduction The newest Actel designed-for-space field programmable gate array FPGA family, RTAX-S/SL, is a highperformance, high-density, antifuse-based FPGA with embedded user static RAM (SRAM). Based on the


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    AC319 verilog hdl code for matrix multiplication vhdl code for pipelined matrix multiplication vhdl code hamming verilog code for matrix multiplication vhdl code for matrix multiplication vhdl code hamming edac memory Core from Libero verilog code hamming hamming code FPGA vhdl coding for hamming code PDF

    RT3PE3000L

    Abstract: RT3PE600L LG484 AES-128 ieee 1532 ProASIC3
    Text: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging


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    MIL-STD-883 RT3PE3000L RT3PE600L LG484 AES-128 ieee 1532 ProASIC3 PDF

    AFS600-FG256

    Abstract: zo 103 ma 75 607 A54 ZENER flashpro3 schematic mark AT0 Unipolar PC atx 400 P4 power supply diagram zener Diode B23 PQ208 QN108 QN180
    Text: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator


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    130-nm, 128-Bit AFS600-FG256 zo 103 ma 75 607 A54 ZENER flashpro3 schematic mark AT0 Unipolar PC atx 400 P4 power supply diagram zener Diode B23 PQ208 QN108 QN180 PDF

    QN68

    Abstract: VQ100 PAC11 ProASIC3 handbook
    Text: Advance v0.5 ProASIC®3 nano Flash FPGAs Features and Benefits Advanced I/Os Wide Range of Features • 10 k to 250 k System Gates • Up to 36 kbits of True Dual-Port SRAM • Up to 71 User I/Os Reprogrammable Flash Technology • • • • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS Process


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    130-nm, 128-Bit QN68 VQ100 PAC11 ProASIC3 handbook PDF

    AES-128

    Abstract: FG256 FG484
    Text: v2.0 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power


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    130-nm, AES-128 FG256 FG484 PDF

    A54 ZENER

    Abstract: AFS600-FG256 mark AT0 QN108 CORE8051 bipolar ROM
    Text: v2.0 Actel Fusion Family of Mixed-Signal FPGAs Features and Benefits In-System Programming ISP and Security High-Performance Reprogrammable Flash Technology Advanced Digital I/O • • • • • Secure ISP with 128-Bit AES via JTAG • FlashLock® to Secure FPGA Contents


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    128-Bit 130-nm, A54 ZENER AFS600-FG256 mark AT0 QN108 CORE8051 bipolar ROM PDF

    ARMv6

    Abstract: cortex a15 core Cortex-m1 Cortex R4 TRANSISTOR ww1 AES-128 FG256 FG484 T8 851
    Text: v1.2 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power


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    130-nm, ARMv6 cortex a15 core Cortex-m1 Cortex R4 TRANSISTOR ww1 AES-128 FG256 FG484 T8 851 PDF

    M7A3P250

    Abstract: QN132 A3P060 ProASIC3 A3P250 2114 SRAM A3P030 A3P125 A3P250 FG144 PQ208
    Text: Product Brief ProASIC 3 Flash Family FPGAs ® ® with Optional Soft ARM Support Features and Benefits • • Advanced I/O High Capacity • • • • • • • 30 k to 1 Million System Gates Up to 144 kbits of True Dual-Port SRAM Up to 300 User I/Os


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    130-nm, 64-Bit A3P030) 128-Bit A3P030l 51700012PB-13/5 M7A3P250 QN132 A3P060 ProASIC3 A3P250 2114 SRAM A3P030 A3P125 A3P250 FG144 PQ208 PDF

    AC270

    Abstract: pll02 ACTEL FUSION AFS1500 verilog code for slave SPI with FPGA
    Text: Application Note AC270 SPI Flash Emulation for Fusion Devices Design Example Contents General Description . . Functional Description Interface Details . . . . Utilization Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .


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    AC270 AC270 pll02 ACTEL FUSION AFS1500 verilog code for slave SPI with FPGA PDF

    20 pin laptop lcd connector

    Abstract: toshiba lcd controller board lcd monitor block diagram LCD-Adapter-NL3224BC35-20 LCD INVERTER BOARD toshiba LCD 320X240 laptop lcd backlight inverter laptop lcd 20 pin diagram 20 pin lcd laptop LCD 320X240
    Text: Application Note AC294 IGLOO-VIDEO-BOARD Upscaling Reference Design Demonstration Objective The IGLOO-VIDEO-BOARD Upscaling Reference Design demonstrates an IGLOO FPGA as an LCD controller with video upscaling feature Figure 1 . The setup is similar to the DVI Input to LCD Reference


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    AC294 20 pin laptop lcd connector toshiba lcd controller board lcd monitor block diagram LCD-Adapter-NL3224BC35-20 LCD INVERTER BOARD toshiba LCD 320X240 laptop lcd backlight inverter laptop lcd 20 pin diagram 20 pin lcd laptop LCD 320X240 PDF

    ahb master bfm

    Abstract: sequential timer block diagram ac336
    Text: Application Note AC336 Designing a High-Speed Timer in SmartFusion Fabric Introduction This document explains how to implement an independent timer in SmartFusion using FPGA fabric. The design example uses a timer with an AHB-Lite interface, implemented so that the timer can be run with an independent


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    AC336 ahb master bfm sequential timer block diagram ac336 PDF

    PMO13701

    Abstract: ritdisplay 96x16 ritdisplay 96x16 SSD0300 oled display 96x16 96x16 oled i2c oled UNSIGNED SERIAL DIVIDER using vhdl OLED circuit details
    Text: Application Note AC347 SmartFusion: Interfacing with OLED using I2C Table of Contents Introduction . . . . . . . . . . . . . . Design Example Overview . . . . . . Description of the Design Example . . Interface Description . . . . . . . . . Software Implementation . . . . . . .


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    AC347 PMO13701 ritdisplay 96x16 ritdisplay 96x16 SSD0300 oled display 96x16 96x16 oled i2c oled UNSIGNED SERIAL DIVIDER using vhdl OLED circuit details PDF