Untitled
Abstract: No abstract text available
Text: GS8342T08/09/18/36AE-300M 165-Bump BGA Military Temp 36Mb SigmaCIO DDR-II Burst of 2 SRAM 300 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Military Temperature Range • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package
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Original
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GS8342T08/09/18/36AE-300M
165-Bump
165-bump,
144Mb
GS8342T08AE-300M
GS8342T09AE-300M
GS8342T18AE-300M
GS8342T36AE-300M
165-Pin
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PDF
|
Untitled
Abstract: No abstract text available
Text: GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaDDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface
|
Original
|
GS8342T08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
GS8342TxxA
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus
|
Original
|
GS8342T08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
m834x36E-300T.
GS8342TxxA
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8342T08/09/18/36AE-300M 165-Bump BGA Military Temp 36Mb SigmaDDR-II Burst of 2 SRAM Features • Military Temperature Range • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface
|
Original
|
GS8342T08/09/18/36AE-300M
165-Bump
165-bump,
GS8342T09AE-300M
165-Pin
GS8342T18AE-300M
GS8342T36AE-300M
GS8342T36AE-300MT.
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package
|
Original
|
GS8342T08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
144Mbiver
GS8342TxxA
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8342T08/09/18/36AE-300M 165-Bump BGA Military Temp 36Mb SigmaDDR-II Burst of 2 SRAM Features • Military Temperature Range • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface
|
Original
|
GS8342T08/09/18/36AE-300M
165-Bump
165-bump,
144Mb
a342T08AE-300M
GS8342T09AE-300M
GS8342T18AE-300M
GS8342T36AE-300M
165-Pin
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8342T08/09/18/36AE-250/200/167 36Mb SigmaDDR-II Burst of 2 SRAM • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface • Byte Write x36, x18, and x9 and Nybble Write (x8) function
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Original
|
GS8342T08/09/18/36AE-250/200/167
165-Bump
165-bump,
144Mb
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaDDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface
|
Original
|
GS8342T08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
165-b2TxxA
GS8342TxxA
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus
|
Original
|
GS8342T08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
GS834x36E-300T.
GS8342TxxA
|
PDF
|
GS8342T36AGE-200
Abstract: GS8342T36AE-300I GS8342T36AGE-250 GS8342T36AE-250
Text: Preliminary GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus
|
Original
|
GS8342T08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
GS8342TxxA
GS8342T36AGE-200
GS8342T36AE-300I
GS8342T36AGE-250
GS8342T36AE-250
|
PDF
|
GS8342T36AE-250
Abstract: GS8342T36AGE-200 GS8342T36 GS8342T36AGE
Text: GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package
|
Original
|
GS8342T08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
GS8342TxxA
GS8342T36AE-250
GS8342T36AGE-200
GS8342T36
GS8342T36AGE
|
PDF
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