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    GAL16Y8A

    Abstract: PAL16L8 programming algorithm gal 16v8 programming algorithm 85C224 PAL12L10N ep330 intel 2107 GAL-2 85c224-66 85C220
    Text: INTEL CORP MEMORY/PL] / 5bE D • M Ö E b l 7 b D 0 7 7 S b D 7^5 « I T L S in y -0 °\ 85C220/85C224-100, -80 AND -66 REGISTER OPTIMIZED TIMING FAST 1-MICRON CHMOS 8-MACROCELL juPLDs T hese register optimized timing /xPLDs of­ fer superior design features:


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    85C220/85C224-100, I486TM 1386TM, I860TM Progr-16 85C220 85C224 65-C/W--PDIP 85C220 GAL16Y8A PAL16L8 programming algorithm gal 16v8 programming algorithm PAL12L10N ep330 intel 2107 GAL-2 85c224-66 PDF