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    FULL SUBTRACTOR Search Results

    FULL SUBTRACTOR Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    100180FC Rochester Electronics LLC 100180 - Adder/Subtractor, 100K Series, 6-Bit, ECL Visit Rochester Electronics LLC Buy
    100182FC Rochester Electronics LLC 100182 - Adder/Subtractor, 100K Series, 1-Bit, ECL, CQFP24 Visit Rochester Electronics LLC Buy
    CS-DSNULW29MF-005 Amphenol Cables on Demand Amphenol CS-DSNULW29MF-005 DB9 Male to DB9 Female Null Modem Cable - Double Shielded - Full Handshaking 5ft Datasheet
    CS-DSNL4259MF-005 Amphenol Cables on Demand Amphenol CS-DSNL4259MF-005 DB25 Male to DB9 Female Null Modem Cable - Double Shielded - Full Handshaking 5ft Datasheet
    CS-DSNULW29MF-010 Amphenol Cables on Demand Amphenol CS-DSNULW29MF-010 DB9 Male to DB9 Female Null Modem Cable - Double Shielded - Full Handshaking 10ft Datasheet

    FULL SUBTRACTOR Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    9304 "pin compatible"

    Abstract: 9304 S2845 4 bit binary full adder and subtractor Adder 9304 Dual 1-Bit with Carry ScansUX980 a9304 9304 fairchild
    Text: 9304 MSI DUAL FULL ADDER A FAIRCHILD COMPATIBLE CURRENT SINKING LOGIC PRODUCT GENERAL DESCRIPTION — The 9304 consists of two independent, high speed, binary full adders. The adders are useful in a wide variety of applications including multiple bit parallel


    OCR Scan     		PDF

    AD395JD

    Abstract: IC 74LS244 LATCH APPLICATIONS AD395
    Text: ANALOG DEVICES □ FEATURES Four Com plete 12-Bit CMOS DACs w ith Buffer Registers Linearity Error ±1/2LSB Tmin-Tmax AD394, AD395K,T Factory-Trimmed Gain and Offset Precision O utput Amplifiers for V 0 u t Full Four Quadrant M ultiplication per DAC M onotonicity Guaranteed Over Full Temperature


    OCR Scan     		12-Bit AD394/AD395 AD395 AD394 AD394, AD395K MIL-STD-883 AD394 AD395JD IC 74LS244 LATCH APPLICATIONS PDF

    AD396TD

    Abstract: AD396
    Text: ANALOG DEVICES □ FE A T U R ES Four, Pre-Trimmed, 14-Bit C M O S D A C s Double Buffered for Sim ultaneous Update Precision Output Amplifiers for Voltage Out Full Four Quadrant Multiplication - Independently Pinned Out D A C Reference Monotonicity Guaranteed Over Full M IL Temp. Range


    OCR Scan     		14-Bit AD396 AD396 14bit, AD396TD PDF

    AD3958

    Abstract: 74ls139 decoder Analog Devices Catalog DAC
    Text: ANALOG DEVICES □ FEATURES Four Com plete 12-Bit CMOS DACs w ith Buffer Registers Linearity Error ± 1/2LSB Tmin-Tmax AD394, AD395K,T Factory-Trimmed Gain and Offset Precision O utput Amplifiers for V 0 u t Full Four Q uadrant Multiplication per DAC M onotonicity Guaranteed Over Full Tem perature


    OCR Scan     		12-Bit AD394/AD395 AD39S AD394 AD394, AD395K MIL-STD-883 AD394 AD395 AD3958 74ls139 decoder Analog Devices Catalog DAC PDF

    FULL SUBTRACTOR using 41 MUX

    Abstract: ALU of 4 bit adder and subtractor "Overflow detection"
    Text: PDSP16318/16318A PDSP16318/PDSP16318A Advance Information Complex Accumulator Advance Information DS3708 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz


    Original     		PDSP16318/16318A PDSP16318/PDSP16318A DS3708 PDSP16318 20-bit 20MHz PDSP16318As PDSP16112A PDSP16318A/B0/AC FULL SUBTRACTOR using 41 MUX ALU of 4 bit adder and subtractor "Overflow detection" PDF

    DS3708

    Abstract: PDSP16112 PDSP16112A PDSP16318 FULL SUBTRACTOR using 41 MUX asi mux ALU of 4 bit adder and subtractor "Overflow detection" TTL ALU of 4 bit adder and subtractor CMOS Full Adder
    Text: PDSP16318/16318A PDSP16318/PDSP16318A Advance Information Complex Accumulator Advance Information DS3708 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz


    Original     		PDSP16318/16318A PDSP16318/PDSP16318A DS3708 PDSP16318 20-bit 20MHz PDSP16318As PDSP16112A PDSP16318A/B0/AC 20MHz DS3708 PDSP16112 PDSP16112A FULL SUBTRACTOR using 41 MUX asi mux ALU of 4 bit adder and subtractor "Overflow detection" TTL ALU of 4 bit adder and subtractor CMOS Full Adder PDF

    "Overflow detection"

    Abstract: FULL SUBTRACTOR using 41 MUX
    Text: PDSP16318 MC PDSP16318 MC Complex Accumulator DS3761 ISSUE 2.1 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications.


    Original     		PDSP16318 DS3761 20-bit 10MHz PDSP16318s PDSP16112A 100ns GC100 "Overflow detection" FULL SUBTRACTOR using 41 MUX PDF

    FULL SUBTRACTOR using 41 MUX

    Abstract: "Overflow detection"
    Text: PDSP16318 MC PDSP16318 MC Complex Accumulator DS3761 ISSUE 2.1 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications.


    Original     		PDSP16318 DS3761 20-bit 10MHz PDSP16318s PDSP16112A 100ns GC100 FULL SUBTRACTOR using 41 MUX "Overflow detection" PDF

    FULL SUBTRACTOR using 41 MUX

    Abstract: PDSP16112 ALU of 4 bit adder and subtractor GC100 PDSP16112A PDSP16318 "Overflow detection"
    Text: PDSP16318 MC PDSP16318 MC Complex Accumulator DS3761 ISSUE 2.1 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications.


    Original     		PDSP16318 DS3761 20-bit 10MHz PDSP16318s PDSP16112A 100ns GC100 FULL SUBTRACTOR using 41 MUX PDSP16112 ALU of 4 bit adder and subtractor GC100 PDSP16112A "Overflow detection" PDF

    FULL SUBTRACTOR using 41 MUX

    Abstract: PDSP16112 GC100 PDSP16112A PDSP16318 "Overflow detection"
    Text: PDSP16318 MC PDSP16318 MC Complex Accumulator Supersedes April 1993 version, DS3761 - 1.2 DS3761 - 2.1 November 1998 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz


    Original     		PDSP16318 DS3761 20-bit 10MHz PDSP16318s PDSP16112A 100ns FULL SUBTRACTOR using 41 MUX PDSP16112 GC100 PDSP16112A "Overflow detection" PDF

    Untitled

    Abstract: No abstract text available
    Text: M MOTOROLA Military 10687 High Speed 2 x 1 Bit Array Multiplier Block ELECTRICALLY TESTED PER: MPG 10687 The 10687 is a dual high speed interactive multiplier. It is designed for use as an array multiplier block. Each device is a modified full adder/subtractor that


    OCR Scan     		PDF

    C1-D18

    Abstract: CQFP 208
    Text: I Features I I I I I ACT5260 64-Bit Superscaler Microprocessor . • High-perform ance floating point unit ■ Full militarized QED RM5260 microprocessor ■ Dual Issue superscalar QED RISCMark


    OCR Scan     		ACT5260 64-Bit RM5260 150MHz SCD5260 C1-D18 CQFP 208 PDF

    7000SC

    Abstract: 17-FP
    Text: Standard Products ACT 7000SC 64-Bit Superscaler Microprocessor June 16, 2004 FEATURES • ■ Full militarized QED RM7000 microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance


    Original     		7000SC 64-Bit RM7000 RM52xx SCD7000 17-FP PDF

    Untitled

    Abstract: No abstract text available
    Text: W tflGEC PLESSEY P R E L IM IN A R Y IN F O R M A T IO N DS3708 - 2.0 PDSP16318/PDSP16318A COMPLEX ACCUMULATOR The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz


    OCR Scan     		DS3708 PDSP16318/PDSP16318A PDSP16318 20-bit 20MHz PDSP16318As PDSP16112A 256ps. PDSP16318/13618A PDSP16318/C0/AC PDF

    Untitled

    Abstract: No abstract text available
    Text: Standard Products ACT 7000ASC 64-Bit Superscaler Microprocessor January 24, 2005 FEATURES • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance


    Original     		7000ASC 64-Bit RM7000A RM52xx SCD7000 PDF

    ACT7000ASC

    Abstract: No abstract text available
    Text: ACT-7000ASC 64-Bit Superscaler Microprocessor Features • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance ● ● ■ ● ● ●


    Original     		ACT-7000ASC 64-Bit RM7000A RM52xx SCD7000A ACT7000ASC PDF

    7000SC

    Abstract: Tag 225 600 replacement SCD7000 R5000 mips R4650 RM5261 RM7000 7000sc210f17 CQFP 240 Aeroflex
    Text: Standard Products ACT 7000SC 64-Bit Superscaler Microprocessor www.aeroflex.com/Avionics October 9, 2009 FEATURES • ■ Full militarized QED RM7000 microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance


    Original     		7000SC 64-Bit RM7000 256KB SCD7000 7000SC Tag 225 600 replacement R5000 mips R4650 RM5261 7000sc210f17 CQFP 240 Aeroflex PDF

    implementing ALU with adder/subtractor

    Abstract: ACT5230 ACT-5230PC-133F22I R4000 R4700 R5000 register file RM5230
    Text: ACT5230 32-Bit Superscaler Microprocessor Features • ■ Full militarized QED RM5230 microprocessor Dual Issue superscalar microprocessor - can issue one integer and one floating-point instruction per cycle ■ High-performance floating point unit ● Single


    Original     		ACT5230 32-Bit RM5230 SPECInt95 SPECfp95 MIL-PRF-38534 133MHz 150MHz 200MHz MIL-STD-883 implementing ALU with adder/subtractor ACT5230 ACT-5230PC-133F22I R4000 R4700 R5000 register file PDF

    Untitled

    Abstract: No abstract text available
    Text: M IT E L PDSP16318 MC SE M IC O N D U C T O R Complex Accumulator DS3761 - 2.1 Supersedes April 1993 version, DS3761 - 1.2 Novem ber 1998 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz


    OCR Scan     		PDSP16318 DS3761 20-bit 10MHz PDSP16318s PDSP16112A 100ns 512ns. PDF

    AD396

    Abstract: sine multiplier AD396JD synchro to digital converter csi
    Text: ► ANALOG DEVICES |iP Compatible Multiplying Quad 14-Bit D/A Converter AD396 FEATURES Four, Pre-Trimmed, 14-Bit CMOS DACs Double Buffered for Simultaneous Update Precision Output Amplifiers for Voltage Out Full Four Quadrant Multiplication - Independently


    OCR Scan     		14-Bit 780mW MIL-STD-883 AD396 14-bit, 28-pin AD396 sine multiplier AD396JD synchro to digital converter csi PDF

    CQFP 208

    Abstract: rm5260
    Text: Standard Products ACT 5260 64-Bit Superscaler Microprocessor www.aeroflex.com/Avionics January 28, 2004 FEATURES ❑ ❑ Full militarized PMC-Sierra RM5260 microprocessor Dual Issue superscalar PMC-Sierra RISCMark can issue one integer and one floating-point


    Original     		64-Bit RM5260 150MHz 200MHz SPECInt95 SPECfp95 SCD5260 CQFP 208 PDF

    RM5260

    Abstract: CQFP 208
    Text: ACT5260 64-Bit Superscaler Microprocessor Features • ■ ■ ■ Full militarized QED RM5260 microprocessor Dual Issue superscalar QED RISCMark - can issue one integer and one floating-point instruction per cycle microprocessor - can issue one integer and one


    Original     		ACT5260 64-Bit RM5260 150MHz 200MHz SPECInt95 SPECfp95 R4600, R4700 R5000 CQFP 208 PDF

    CQFP 208 datasheet

    Abstract: ACT5260 R4000 R4700 R5000
    Text: ACT5260 64-Bit Superscaler Microprocessor Features • ■ ■ ■ Full militarized QED RM5260 microprocessor Dual Issue superscalar QED RISCMark - can issue one integer and one floating-point instruction per cycle microprocessor - can issue one integer and one


    Original     		ACT5260 64-Bit RM5260 150MHz 200MHz SPECInt95 SPECfp95 R4600, R4700 R5000 CQFP 208 datasheet ACT5260 R4000 R5000 PDF

    ACT5271

    Abstract: R4700 R5000 RM5261 RM5271 RM7000
    Text: ACT5271 64-Bit Superscaler Microprocessor Features • ■ Full militarized QED RM5271 microprocessor Dual Issue superscalar microprocessor - can issue one integer and one floating-point instruction per cycle ■ ● Single cycle repeat rate for common single precision operations


    Original     		ACT5271 64-Bit RM5271 SPECInt95 SPECfp95 RM7000, RM5270, 150MHz 200MHz 250MHz ACT5271 R4700 R5000 RM5261 RM7000 PDF