FPGA 78-PIN DDR Search Results

FPGA 78-PIN DDR Result Highlights (5)

Part	Manufacturer	Description	Download
CS-DSDMDB09MF-010	Amphenol Cables on Demand	Amphenol CS-DSDMDB09MF-010 9-Pin (DB9) Deluxe D-Sub Cable - Copper Shielded - Male / Female 10ft	Datasheet
CS-DSDMDB15MF-002.5	Amphenol Cables on Demand	Amphenol CS-DSDMDB15MF-002.5 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Female 2.5ft	Datasheet
CS-DSDMDB15MM-025	Amphenol Cables on Demand	Amphenol CS-DSDMDB15MM-025 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Male 25ft	Datasheet
CS-DSDMDB25MM-010	Amphenol Cables on Demand	Amphenol CS-DSDMDB25MM-010 25-Pin (DB25) Deluxe D-Sub Cable - Copper Shielded - Male / Male 10ft	Datasheet
CS-DSDMDB37MM-002.5	Amphenol Cables on Demand	Amphenol CS-DSDMDB37MM-002.5 37-Pin (DB37) Deluxe D-Sub Cable - Copper Shielded - Male / Male 2.5ft	Datasheet

FPGA 78-PIN DDR Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Vantis ISP cable Abstract: CMB2102 EPF10K Tektronix 2224 Text: MMCCMB2102 Controller and Memory Board CMB2102 User’s Manual Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described	Original	MMCCMB2102 CMB2102) RS232 MMCCMB2102UM/D Vantis ISP cable CMB2102 EPF10K Tektronix 2224	PDF
CODE VHDL TO LPC BUS INTERFACE Abstract: FD1S3IX schematic symbols LCMXO256C TQFP100 simple vhdl project Text: FPGA Schematic and HDL Design Tutorial Lattice Semiconductor Corporation 5555 NE Moore Court Hillsboro, OR 97124 503 268-8000 November 2008 Copyright Copyright 2008 Lattice Semiconductor Corporation. This document may not, in whole or part, be copied, photocopied,	Original		PDF
XC3S700A Abstract: xc3s200aft256 XC3S400AFT256 XC3S50A L01P L02P FG320 UG331 L05P xc3s400a ftg256 Text: Spartan-3A FPGA Family: Data Sheet R DS529 July 10, 2007 Product Specification Module 1: Introduction and Ordering Information - DS529-1 v1.4.1 July 10, 2007 • • • • • • • Introduction Features Architectural and Configuration Overview General I/O Capabilities	Original	DS529 DS529-1 DS529-2 DS529-3 XC3S50A XC3S200A FT256 DS529-4 XC3S700A xc3s200aft256 XC3S400AFT256 L01P L02P FG320 UG331 L05P xc3s400a ftg256	PDF
W65C832PXB Datasheet Abstract: W65C832PXB 40 pin LCD connector led verilog SATA dual digit 7 segment display 9 pin configuration dual 7 segment display Text: FEBRUARY 3, 2014 W65C832PXB Datasheet W65C832PXB Datasheet WDC reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Information contained herein is provided gratuitously and without liability, to any user. Reasonable	Original	W65C832PXB W65C832PXB W65C832PXB Datasheet 40 pin LCD connector led verilog SATA dual digit 7 segment display 9 pin configuration dual 7 segment display	PDF
iodelay Abstract: XAPP880 OSERDES pmbus verilog FIFO18E1 ML605 ISERDES example ml605 XAPP855 samtec QSE Text: Application Note: Virtex-6 FPGAs SFI-4.1 16-Channel SDR Interface with Bus Alignment Using Virtex-6 FPGAs XAPP880 v1.0 February 10, 2010 Author: Vasu Devunuri Summary This application note describes an SFI-4.1 reference design that implements the OIF-SFI4-01.01 interface [Ref 1], a 16-channel, source-synchronous LVDS interface operating	Original	16-Channel XAPP880 OIF-SFI4-01 16-channel, iodelay XAPP880 OSERDES pmbus verilog FIFO18E1 ML605 ISERDES example ml605 XAPP855 samtec QSE	PDF
Untitled Abstract: No abstract text available Text: LogiCORE IP Multi-Port Memory Controller v6.06.a DS643 February 22, 2013 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP Multi-Port Memory Controller (MPMC) is a fully parameterizable memory controller that supports SDRAM/DDR/DDR2/DDR3/LPDDR	Original	DS643 PPC440MC)	PDF
xc3s500e fg320 Abstract: xc3s500e VQG100 XC3S500E FGG320 NUMONYX xilinx bpi intel j3d XC3S250E M25PXX xc3s1600e fg320 XC3S500E DS312-3 Text: Spartan-3E FPGA Family: Data Sheet R DS312 v3.8 August 26, 2009 Product Specification Module 1: Spartan-3E FPGA Family: Introduction and Ordering Information Module 3: DC and Switching Characteristics DS312-1 (v3.8) August 26, 2009 • • • • • •	Original	DS312 DS312-1 DS312-3 DS312-2 XC3S500E XC3S1600E VQG100 DS312-4 xc3s500e fg320 xc3s500e VQG100 XC3S500E FGG320 NUMONYX xilinx bpi intel j3d XC3S250E M25PXX xc3s1600e fg320 DS312-3	PDF
socket am3 pinout Abstract: socket AM2 pinout AM2 pinout Socket F am2 socket pin diagram am3 socket pinout am3 socket pin diagram am2 socket pinout socket AM3 pinout diagram PCIe cable pinout LX5511 Text: Broaddown4 User Manual Issue – 2.00 draft Enterpoint Ltd. - Broaddown4 Manual – Issue 2.00 11/04/2007 Kit Contents You should receive the following items with you Broaddown4 development kit: 1 - Broaddown4 Board 2 - Programming Cable Prog2 Figure 1 - Broaddown4 Board	Original		PDF
ORT8850 Abstract: ORT8850H ORT8850L STM-64 STS-192 Text: Preliminary Product Brief May 2000 ORCA ORT8850 Field-Programmable System Chip Introduction Field-programmable system chips FPSCs bring a whole new dimension to programmable logic: FPGA logic and an embedded system solution on a single device. Lucent Technologies Microelectronics Group	Original	ORT8850 ORT8850 PN00-071FPGA ORT8850H ORT8850L STM-64 STS-192	PDF
Untitled Abstract: No abstract text available Text: Spartan-6 FPGA Clocking Resources User Guide UG382 v1.8 June 20, 2013 Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL	Original	UG382	PDF
ORT8850 Abstract: ORT8850H ORT8850L scrambling write operation using ram in fpga Text: Product Brief July 2001 ORCA ORT8850 Field-Programmable System Chip FPSC Eight-Channel x 850 Mbits/s Backplane Transceiver Introduction Field-programmable system chips (FPSCs) bring a whole new dimension to programmable logic: FPGA logic and an embedded system solution on a single	Original	ORT8850 PB01-115NCIP PB00-069FPGA) ORT8850H ORT8850L scrambling write operation using ram in fpga	PDF
UG365 Abstract: UG-361 XC6VLX240T UG365 XC6VLX240T-1FFG1156 DSP48E1 VIRTEX-6 UG362 write operation using ram in fpga xc6vlx240t VIRTEX-6 UG373 frequency detection using FPGA Text: → 11 Virtex-6 Family Overview DS150 v2.4 January 19, 2012 Product Specification General Description The Virtex -6 family provides the newest, most advanced features in the FPGA market. Virtex-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on	Original	DS150 DSP48E1 UG369) UG368) XC6VLX760. UG370) UG373) UG365 UG-361 XC6VLX240T UG365 XC6VLX240T-1FFG1156 VIRTEX-6 UG362 write operation using ram in fpga xc6vlx240t VIRTEX-6 UG373 frequency detection using FPGA	PDF
DSP48E1 Abstract: FPGA Virtex 6 LXT virtex 6 XC6VSX475T XC6VLX240T-1FFG1156 "Binary Multipliers" UG-361 virtex+6 UG366 1000BASE-X DS150 Text: 11 Virtex-6 Family Overview DS150 v2.1 November 6, 2009 Advance Product Specification General Description The Virtex -6 family provides the newest, most advanced features in the FPGA market. Virtex-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on	Original	DS150 UG364) UG366) XC6VLX760. UG371) XC6VHX250T XC6VHX380T FF1154 DSP48E1 UG369) FPGA Virtex 6 LXT virtex 6 XC6VSX475T XC6VLX240T-1FFG1156 "Binary Multipliers" UG-361 virtex+6 UG366 1000BASE-X DS150	PDF
XC5VLX50T-1FFG665C Abstract: ff1156 VIRTEX-5 DDR2 controller FFG1156 VIRTEX-5 DDR PHY Virtex-5 Ethernet development Virtex-5 LXT Ethernet DSP48E SRL16 XC5VLX220 Text: R DS100 v5.0 February 6, 2009 Virtex-5 Family Overview Product Specification General Description The Virtex -5 family provides the newest most powerful features in the FPGA market. Using the second generation ASMBL (Advanced Silicon Modular Block) column-based architecture, the Virtex-5 family contains five distinct platforms (sub-families), the most choice	Original	DS100 36-Kbit UG197) UG200) UG194) XC5VLX50T-1FFG665C ff1156 VIRTEX-5 DDR2 controller FFG1156 VIRTEX-5 DDR PHY Virtex-5 Ethernet development Virtex-5 LXT Ethernet DSP48E SRL16 XC5VLX220	PDF

L130C Abstract: L74c l31c l97c l65c A311TC l146c l48c L202C L235C Text: ORCA ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC May 2009 Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSPI4 FPSC contains two	Original	8b/10b OIF-SPI4-02 1156-fpBGA 1036-ball 6A-07 1036fpSBGA 1036-ftSBGA) 06x-09 1036-pin 1036-pin L130C L74c l31c l97c l65c A311TC l146c l48c L202C L235C	PDF
XQ5VLX110 Abstract: XQ5VLX330T SX95T DS714 XQ5VFX130T ROCKETIO VIRTEX-5 LX110 UG190 UG191 UG195 Text: 74 Virtex-5Q FPGA Data Sheet: DC and Switching Characteristics DS714 v2.0 December 17, 2009 Product Specification Virtex-5Q FPGA Electrical Characteristics Virtex -5Q FPGAs are available in -2 and -1 speed grades, with -2 having the highest performance. Virtex-5Q FPGA	Original	DS714 DS174, UG190, UG191, UG192, UG193, UG194, UG195, UG196, XQ5VLX110 XQ5VLX330T SX95T DS714 XQ5VFX130T ROCKETIO VIRTEX-5 LX110 UG190 UG191 UG195	PDF
Untitled Abstract: No abstract text available Text: External Memory Interfaces in Stratix V Devices 7 2012.12.28 SV51008 Subscribe Feedback The Stratix V devices provide an efficient architecture that allows you to fit wide external memory interfaces to support a high level of system bandwidth within the small modular I/O bank structure. The I/Os are	Original	SV51008	PDF
alaska atx 250 p4 Abstract: DSP48A1 SP605 Text: SP605 Hardware User Guide UG526 v1.8 September 24, 2012 Copyright 2009–2012 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.	Original	SP605 UG526 2002/96/EC 2002/95/EC 2006/95/EC, 2004/108/EC, alaska atx 250 p4 DSP48A1	PDF
Virtex-7 XC7VX485T FPGA Abstract: No abstract text available Text: 16 7 Series FPGAs Overview DS180 v1.14 July 29, 2013 Advance Product Specification General Description Xilinx 7 series FPGAs comprise three new FPGA families that address the complete range of system requirements, ranging from low cost, small form factor, cost-sensitive, high-volume applications to ultra high-end connectivity bandwidth, logic capacity, and signal processing capability for the most	Original	DS180 Virtex-7 XC7VX485T FPGA	PDF
XC3S700AN FGG484 Abstract: XC3S400AN-FGG400 XC3S700A FGG484 xc3s200an XC3S400AN FGG400 FGG676 SPARTAN 3an XC3S50A XC3S700AN-FG484 XC3S700AN Text: Spartan-3AN FPGA Family Data Sheet R DS557 June 2, 2008 Module 1: Introduction and Ordering Information - DS557-1 v3.1 June 2, 2008 • • • • • • • • Introduction Features Architectural Overview Configuration Overview In-system Flash Memory Overview	Original	DS557 DS557-1 XC3S50AN. XC3S700AN FG484 XC3S1400AN FGG676 DS557-4 XC3S700AN FGG484 XC3S400AN-FGG400 XC3S700A FGG484 xc3s200an XC3S400AN FGG400 SPARTAN 3an XC3S50A XC3S700AN-FG484	PDF
Untitled Abstract: No abstract text available Text: NXP high-speed ADC/ DAC selection guide Best-in-class ADCs & DACs Available with three different data interfaces including JESD204A/JESD204B , our high-speed ADC/DAC solutions deliver best-in-class performance, size, and functional integration. High-speed single- and dual-channel ADCs	Original	JESD204A/JESD204B) JESD204A, JESD204B voltag628D1G25	PDF
EP2S15 Abstract: EP2S180 EP2S30 EP2S60 EP2S90 Text: 1. Introduction SII51001-4.2 Introduction The Stratix II FPGA family is based on a 1.2-V, 90-nm, all-layer copper SRAM process and features a new logic structure that maximizes performance, and enables device densities approaching 180,000 equivalent logic elements LEs . Stratix II devices offer up to 9 Mbits of	Original	SII51001-4 90-nm, 18-bit 18-bit) EP2S15 EP2S180 EP2S30 EP2S60 EP2S90	PDF
PT43C Abstract: PR41C pin diagram of ic 7495 shift register CORE F5A Y 928 K00 064 PT42C 21-INPUT pr46c OR4E10 k72 u2 Text: Preliminary Data Sheet August 2000 ORCA Series 4 Field-Programmable Gate Arrays Programmable Features • ■ High-performance platform design. — 0.13 µm seven-level metal technology. — Internal performance of >250 MHz four logic levels . — I/O performance of >416 MHz for all user I/Os.	Original	DS00-221FPGA PT43C PR41C pin diagram of ic 7495 shift register CORE F5A Y 928 K00 064 PT42C 21-INPUT pr46c OR4E10 k72 u2	PDF
XC3S400 PQ208 Abstract: SPARTAN-3 XC3S400 PQ208 XC3S400-PQ208 XC3S1000-FG456 xc3s400pq208 SPARTAN-3 XC3S400 pq208 architecture XC3S1000-FT256 XC3S400 TQ144 XC3S200 RELIABILITY REPORT SPARTAN-3 XC3S400 Text: Spartan-3 FPGA Family: Complete Data Sheet R DS099 December 24, 2003 Advance Product Specification This document includes all four modules of the Spartan -3 FPGA data sheet. Module 1: Introduction and Ordering Information Module 3: DC and Switching Characteristics	Original	DS099 DS099-1 DS099-3 FG320: 320-lead TQ144 PQ208 FG676 FG900 DS099-1, XC3S400 PQ208 SPARTAN-3 XC3S400 PQ208 XC3S400-PQ208 XC3S1000-FG456 xc3s400pq208 SPARTAN-3 XC3S400 pq208 architecture XC3S1000-FT256 XC3S400 TQ144 XC3S200 RELIABILITY REPORT SPARTAN-3 XC3S400	PDF

FPGA 78-PIN DDR Search Results

FPGA 78-PIN DDR Result Highlights (5)

FPGA 78-PIN DDR Datasheets Context Search

Vantis ISP cable

CODE VHDL TO LPC BUS INTERFACE

XC3S700A

W65C832PXB Datasheet

iodelay

Untitled

xc3s500e fg320

socket am3 pinout

ORT8850

Untitled

ORT8850

UG365

DSP48E1

XC5VLX50T-1FFG665C

L130C

XQ5VLX110

Untitled

alaska atx 250 p4

Virtex-7 XC7VX485T FPGA

XC3S700AN FGG484

Untitled

EP2S15

PT43C

XC3S400 PQ208