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    FLOW Search Results

    FLOW Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    Flower-Reference-Design Renesas Electronics Corporation Flower Reference Design Featuring 4.5V - 18V Input Switching Regulator Visit Renesas Electronics Corporation
    FS1025 Renesas Electronics Corporation Liquid Flow Sensor Module Visit Renesas Electronics Corporation
    FS1027 Renesas Electronics Corporation Liquid Flow Sensor Module Visit Renesas Electronics Corporation
    FS1023 Renesas Electronics Corporation Liquid Flow Sensor Module Visit Renesas Electronics Corporation
    49C465APQF9 Renesas Electronics Corporation 32 BIT CMOS FLOW-THRU EDC Visit Renesas Electronics Corporation
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    FLOW Price and Stock

    Advanced Thermal Solutions Inc ATS-UC-QFLOW-100

    QUADFLOW HEATSINK 1U AL FINS
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    DigiKey ATS-UC-QFLOW-100 Box 152 1
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    Advanced Thermal Solutions Inc ATS-UC-DFLOW-100

    DUALFLOW HEATSINK 1U AL FINS
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    DigiKey ATS-UC-DFLOW-100 Box 148 1
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    Wakefield-Vette FLOWLED-3850

    FLOW LED HEAT SINK 38MM DIA 50H
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    DigiKey FLOWLED-3850 Bulk 134 1
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    Mouser Electronics FLOWLED-3850 56
    • 1 $9.03
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    Advanced Thermal Solutions Inc ATS-UC-QFLOW-200

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    DigiKey ATS-UC-QFLOW-200 Box 102 1
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    Sager ATS-UC-QFLOW-200 5 1
    • 1 $153.28
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    Advanced Thermal Solutions Inc ATS-UC-DFLOW-200

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    DigiKey ATS-UC-DFLOW-200 Box 94 1
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    Avnet Americas ATS-UC-DFLOW-200 Box 25 8 Weeks 5
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    Mouser Electronics ATS-UC-DFLOW-200 101
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    FLOW Datasheets (156)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    Flow LB03 National Semiconductor SIMPLE SWITCHER Step-Up Voltage Regulator Original PDF
    FLOWLED-3820 Wakefield-Vette FLOW LED HEAT SINK 38MM DIA 20H Original PDF
    FLOWLED-3850 Wakefield-Vette FLOW LED HEAT SINK 38MM DIA 50H Original PDF
    FLOWLED-7040 Wakefield-Vette FLOW LED HEAT SINK 70MM DIA 40H Original PDF
    FLOWLED-7080 Wakefield-Vette FLOW LED HEAT SINK 70MM DIA 80H Original PDF
    FLOWLED-8540 Wakefield-Vette FLOW LED HEAT SINK 85MM DIA 40H Original PDF
    FLOWLED-8560 Wakefield-Vette FLOW LED HEAT SINK 85MM DIA 60H Original PDF
    FLOWLED-9650 Wakefield-Vette FLOW LED HEAT SINK 96MM DIA 50H Original PDF
    FLOWLED-9680 Wakefield-Vette FLOW LED HEAT SINK 80MM DIA 90H Original PDF
    PA1001A Flowmetrics Signal Conditioners / Converters Instalation / Operation Manual Original PDF
    PA1001A Flowmetrics Signal Conditioners / Converters Original PDF
    PA-1001A Flowmetrics SIGNAL CONDITIONER & CONVERTERS Original PDF
    PA-1001A1AB1W Flowmetrics SIGNAL CONDITIONER & CONVERTERS Original PDF
    PA-1001A1AB1X Flowmetrics SIGNAL CONDITIONER & CONVERTERS Original PDF
    PA-1001A1AB1Y Flowmetrics SIGNAL CONDITIONER & CONVERTERS Original PDF
    PA-1001A1AB1Z Flowmetrics SIGNAL CONDITIONER & CONVERTERS Original PDF
    PA-1001A1AB2W Flowmetrics SIGNAL CONDITIONER & CONVERTERS Original PDF
    PA-1001A1AB2X Flowmetrics SIGNAL CONDITIONER & CONVERTERS Original PDF
    PA-1001A1AB2Y Flowmetrics SIGNAL CONDITIONER & CONVERTERS Original PDF
    PA-1001A1AB2Z Flowmetrics SIGNAL CONDITIONER & CONVERTERS Original PDF
    ...

    FLOW Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: S6903G,S6903J TOSHIBA BI-DIRECTIONAL TRIODE THYRISTOR SILICON PLANAR TYPE S6903G, S6903J AC POWER CONTROL APPLICATIONS Unit: mm z High Rush Current Capability Optimal for controlling actuators where high rush current may flow : ITRM = 120A n = 100k cycle, Tc = 45°C


    Original     		PDF S6903G S6903J S6903G, S6903J

    Untitled

    Abstract: No abstract text available
    Text: 54AC11109, 74AC11109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET TI0066— D2957, M ARCH 1987— REVISED M ARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11109 . . . J PACKAGE 74AC11109 . . . D OR N PACKAGE TOP VIEW


    OCR Scan     		PDF 54AC11109, 74AC11109 TI0066-- D2957, 500-mA STD-883C 300-mil 54AC11109 74AC11109

    Untitled

    Abstract: No abstract text available
    Text: 54AC11032, 74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATES TI0060— D2957, JULY 1987— REVISED MARCH 1990 54A C 11032 . . . J PACKAGE 74A C 11032 . . . D OR N PACKAGE • Flow-Through Architecture to Optimize PCB Layout TOP VIEW • Center-Pin V c c and GND Configurations to


    OCR Scan     		PDF 54AC11032, 74AC11032 TI0060-- D2957, 500-mA 300-mil 54AC11032

    Untitled

    Abstract: No abstract text available
    Text: 54AC11021,74AC11021 DUAL 4-INPUT POSITIVE-AND GATES _ D2957. JULY 1987 - REVISED APRIL 1993 54AC11021 . . . J PACKAGE 74AC11021 . . . D OR N PACKAGE TOP VIEW * Flow-Through Architecture Optimizes PCB Layout * Center-Pin Vcc and GND Configurations


    OCR Scan     		PDF 54AC11021 74AC11021 D2957. 500-mA 300-mll

    Untitled

    Abstract: No abstract text available
    Text: 54AC11002, 74AC11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES D2957, JUNE 1987 - REVISED APRIL 1993 54AC11002 . . . J PACKAGE 74AC11002 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin Vcc and GND Configuration Minimizes High-Speed Switching Noise


    OCR Scan     		PDF 54AC11002, 74AC11002 D2957, 500-mA 300-mil 54AC11002

    Untitled

    Abstract: No abstract text available
    Text: 54ACT11002,74ACT11002 QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCAS003A - D2957, JUNE 1987 - REVISED APRIL 1993 Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout Center-PIn V^c and GND Configurations Minimize High-Speed Switching Noise


    OCR Scan     		PDF 54ACT11002 74ACT11002 SCAS003A D2957, 500-mA 300-mll

    D2957

    Abstract: No abstract text available
    Text: 54AC11241, 74AC11241 OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS I_ • ■ I I I D2957, JULY 1987-R E V IS E D APRIL 1993 * 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers * Flow-Through Architecture Optimizes PCB Layout * Center-Pin Vcc and GND Configurations


    OCR Scan     		PDF 500-mA 300-mll AC11240 AC11244, D2957

    74AC11520

    Abstract: No abstract text available
    Text: 54AC11520,74AC11520 8-BIT IDENTITY COMPARATORS D2957, JULY 1987 - REVISED APRIL 1993 54AC11520 . . . J PACKAGE 74AC11S20. . . DW OR N PACKAGE TOP VIEW Compares TVvo 8-Bit Words Flow-Through Architecture Optimizes PCB Layout Center-PIn Vcc and GND Configurations


    OCR Scan     		PDF 54AC11520 74AC11520 D2957, 500-mA 300-mil 54AC11520 74AC11S20.

    2a117

    Abstract: No abstract text available
    Text: 54AC11158, 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS TI010&— D 2957 JULY 1969— REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11158 . . . J PACKAGE 74AC11158 . . . DW OR N PACKAGE TOP VIEW Center-Pin V c c and GND Configurations to


    OCR Scan     		PDF 54AC11158, 74AC11158 TI010 500-mA 300-mil 54AC11158 74AC11158 2a117

    D3348

    Abstract: 74AC11151
    Text: 74AC11151 1-0F-8 DATA SELECTOR/MULTIPLEXER D3348, JUNE 1989 - REVISED APRIL 1993 * 8-Llne to 1-Llne Multiplexers Can Perform as Boolean Function Generators, Parallel-to-Serlal Converters, or Data Source Selectors * Flow-Through Architecture Optimizes PCB Layout


    OCR Scan     		PDF 74AC11151 D3348, 500-mA 300-mil D3348

    Untitled

    Abstract: No abstract text available
    Text: 54AC 11004, 74AC11004 HEX INVERTERS TI0044— D2957, FEBRUARY 1068— REVISED M ARCH 1990 54AC11004 . . . J PACKAGE 74AC11004 . . . DW OR N PACKAGE • Flow-Through Architecture to Optimize PCB Layout TOP VIEW • Center-Pin Vq c and GND Configurations to


    OCR Scan     		PDF 74AC11004 TI0044-- D2957, 500-mA 300-mil 54AC11004 74AC11004

    Untitled

    Abstract: No abstract text available
    Text: 74AC11204 HEX INVERTER/CLOCK DRIVER D3427, O C TO B ER 1989 DW OR N PACKAGE Low-Skew Propagation Delay Specifications for Clock Driver Applications TOP VIEW 1Y[ 1 2Y [ 2 3Y [ 3 Flow-Through Architecture Optimizes PCB Layout * * * Package Options Include Plastic “Small


    OCR Scan     		PDF 74AC11204 D3427, 500-mA 300-mil

    54AC11181

    Abstract: TI018
    Text: 54AC11181, 74AC11181 ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS T I0184— D 3119, APRIL 1989— REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11181 . . . JT PACKAGE 74AC11181 . . . DW OR NT PACKAGE TOP VIEW Minimize High-Speed Switching Noise


    OCR Scan     		PDF 54AC11181, 74AC11181 I0184-- 500-mA 300-mil 54AC11181 74AC11181 54AC11181 TI018

    74AC11873

    Abstract: No abstract text available
    Text: 54AC11873, 74AC11873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS • 54A C 11 8 73 . . . J T P A C K A G E 3-State Buffer-Type Outputs Drive Bus 74AC 11B73 . . . D W OR N T P A C K A G E Lines Directly TOP V IE W • Bus-Structured Pinout • Flow -Through A rchitecture O ptim izes PCB


    OCR Scan     		PDF 54AC11873, 74AC11873 11B73 500-m D3390,

    TI009

    Abstract: No abstract text available
    Text: 54AC11643, 74AC 11643 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS T I0095— D2957, JU LY 1987— REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11643 . . . JT PACKAGE 74AC11643 . . . DW OR NT PACKAGE TOP VIEW Center-Pin V c c and GND Configurations to


    OCR Scan     		PDF 54AC11643, I0095-- D2957, 500-mA 300-mil 54AC11643 74AC11643 TI009

    D2957

    Abstract: 1987-REVISEDAPRIL
    Text: 54ACT11030,74ACT11030 8-INPUT POSITIVE-NAND GATES _ D2957. MARCH 1987-REVISEDAPRIL 1993 Inputs Are TTL*Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-PIn V^c and GNO Configurations Minimize High-Speed Switching Noise EPIC Enhanced-Perlormance Implanted


    OCR Scan     		PDF 54ACT11030 74ACT11030 D2957. 1987-REVISEDAPRIL 500-mA 300-mll D2957, D2957

    74AC108

    Abstract: so 54 t 74AC11066
    Text: 54AC11086, 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES TI0152— D3375, N O VEM BER 1989 • Flow-Through Architecture to Optimize PCB Layout 54AC11086 . . . J PACKAGE 74AC11086 . . . D OR N PACKAGE TOP VIEW • Center-Pin Vqc and GND Configurations to


    OCR Scan     		PDF 54AC11086, 74AC11086 TI0152-- D3375, 500-mA 300-mil 74AC108 so 54 t 74AC11066

    ti0041

    Abstract: No abstract text available
    Text: 54ACT11000, 74ACT11000 QUADRUPLE 2-INPUT POSITIVE-NAND GATES T I0041— D2957, JUNE 1967— REVISED M ARCH 1990 • Inputs are TTL-Voltage Compatible 5 4 A C T 11 0 00 . . . J P ACKA G E 7 4 A C T 1 1000 . . . D O R N PACKA GE • Flow-Through Architecture to Optimize PCB


    OCR Scan     		PDF 54ACT11000, 74ACT11000 I0041-- D2957, 500-mA 300-mil ti0041

    Untitled

    Abstract: No abstract text available
    Text: 54AC11074,74AC11074 DUAL D-TYPE POSUIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET D2957, D E C E M B E R 1986 - REVISED A P R IL 1983 54AC11074. . . J PACKAGE 74AC11074. . . D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout


    OCR Scan     		PDF 54AC11074 74AC11074 D2957, 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 54AC11020,74AC11020 DUAL 4-INPUT POSITIVE-NAND GATES D2957, MAHCH 1987-REVISEDAPRIL1993 54AC11020. . . J PACKAGE 74AC11020. . . D OR N PACKAGE TOP VIEW * Flow-Through Architecture Optimizes PCB Layout * Center-Pin Vcc and GND Configurations Minimize High-Speed Switching Noise


    OCR Scan     		PDF 54AC11020 74AC11020 D2957, 1987-REVISEDAPRIL1993 500-mA 300-mil

    CIRCUITS-13

    Abstract: No abstract text available
    Text: 9. PRECAUTIONS IN DESIGNING CIRCUITS 9-1 Input Processing 1 Processing of unused gate Inputs of CMOS IC have such a high im pedance th at th e logic level becom es undefined under open conditions. If th e input is a t an interm ediate level, the P-channel and N-channel transistors both tu rn on, and excessive supply cu rren t flows.


    OCR Scan     		PDF CIRCUITS-13 CIRCUITS-13

    tc9800

    Abstract: CP1128 TC9806 TC9802
    Text: 4. D e v e l o p m e n t F lo w a n d D e v e l o p m e n t S u p p o r t T o o ls 4.1 D e v e lo p m e n t F lo w Figure 4-1 shows the normal PLD development flow. When system and logic designs are complete, the design data m ust be input to the PLD development software.


    OCR Scan     		PDF TC9800/01 TC9802/03 TC9804/0S TC9806/07 TC9808/09 tc9800 CP1128 TC9806 TC9802

    Untitled

    Abstract: No abstract text available
    Text: SN54F541, SN74FS41 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS 03126, JANUARY 1989 Data Flow-Through Pinout All Inputs on Opposite Side from Outputs (TOP VIEW) 51 C A id A2 C A3 C A4 C Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers,


    OCR Scan     		PDF SN54F541, SN74FS41 300-mil SN54F541 SN74F541 SN74F541

    Untitled

    Abstract: No abstract text available
    Text: 54AC11030, 74AC11030 8-INPUT POSITIVE-NAND GATES D2957. JUNE 1987-R E V IS E D APRIL 1993 Flow-Through Architecture Optimizes PCB Layout Center-Pin Vqc and GND Configurations Minimize High-Speed Switching Noise EPIC'“ Enhanced-Pertormance Implanted CMOS 1-^m Process


    OCR Scan     		PDF 54AC11030, 74AC11030 D2957. 1987-R 500-mA 300-mll S4AC11032-85 54AC11030 D2957,