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Catalog Datasheet	MFG & Type	PDF	Document Tags
Celaro Abstract: TC240 green hills compiler fastscan G7M datasheet tc160 TC140 TC200 TC260 TC280 Text: 2006-2 製品カタログ SoC System on a Chip EDA 当社は品質､信頼性の向上に努めておりますが､一般に半導体製品は誤作動した新潟電子デバイス営業担当 (025)246-8250 長野電子デバイス営業部 (0263)35-6642	Original	PDF	BCJ0011D BCJ0011C Celaro TC240 green hills compiler fastscan G7M datasheet tc160 TC140 TC200 TC260 TC280
nec 10f Abstract: uPD65881 IC Ensemble mentor robot MM 5649 A1362 CMOS-N5 NEC lqfp 52 Text: 0.5µm CMOS Gate Array CMOS-N5 Family New s t c u Prod Features The CMOS-N5 family is a channel-less type gate array that provides high speed operation with a 5-V power supply voltage. Drastic cost reductions have been achieved compared with the conventional CMOS-6 and CMOS-8 families thanks to	Original	PDF	A13629EJ5V2PF00 nec 10f uPD65881 IC Ensemble mentor robot MM 5649 A1362 CMOS-N5 NEC lqfp 52
5962-96B02 Abstract: fpga radiation 80C31 "UNITED TECHNOLOGIES MICROELECTRONICS" Text: Semicustom Products UTE/UTE-R Gate Array Family Data Sheet May 1996 FEATURES Up to 125,000 usable equivalent gates QML Q and V compliant Designed specifically for high reliability applications Advanced sub-micron 0.9 leff silicon gate CMOS process JTAG (IEEE 1149.1) boundary-scan registers built into I/O	Original	PDF	0E-10 64KPROM-2-6-96 5962-96B02 fpga radiation 80C31 "UNITED TECHNOLOGIES MICROELECTRONICS"
ahb arbiter in mentor Abstract: 16x16x1.4 Text: GS40 0.11-µm CMOS Standard Cell/Gate Array Version 0.5 May 19, 2000 Copyright  Texas Instruments Incorporated, 2000 The information and/or drawings set forth in this document and all rights in and to inventions disclosed herein and patents which might be granted thereon disclosing or employing the	Original	PDF
verilog code voltage regulator Abstract: verilog code for 32 bit risc processor vhdl code for watchdog timer of ATM fastscan verilog code for 16 bit risc processor NET 1672 analog to digital converter verilog Multi-Channel DMA Controller verilog code arm processor Texas Instruments I2C Text: GS30TR 0.15-µm CMOS Standard Cell/Gate Array Version 1.2 May 17, 2000 Copyright  Texas Instruments Incorporated, 2000 The information and/or drawings set forth in this document and all rights in and to inventions disclosed herein and patents which might be granted thereon disclosing or employing the	Original	PDF	GS30TR verilog code voltage regulator verilog code for 32 bit risc processor vhdl code for watchdog timer of ATM fastscan verilog code for 16 bit risc processor NET 1672 analog to digital converter verilog Multi-Channel DMA Controller verilog code arm processor Texas Instruments I2C
ARM dual port SRAM compiler Abstract: rm2510 synopsys dc ultra DSPG 16C450 16C550 ARM920T ARM940T IEEE1284 STD110 Text: V S MSUNG STD130 ELECTRONICS STD130 Standard Cell 0.18um System-On-Chip ASIC Dec 2000, V2.0 Features 1.8/2.5/3.3V - Leff= 0.15um, Ldrawn = 0.18um Device - Up to 23 million gates - Power dissipation :24nW/MHz 3.3/5.0V - Gate Delay : 48ps @ 1.8V, 1SL Device	Original	PDF	STD130 STD130 24nW/MHz ARM920T/ARM940T, ARM dual port SRAM compiler rm2510 synopsys dc ultra DSPG 16C450 16C550 ARM920T ARM940T IEEE1284 STD110
ICX 061 Abstract: ICX-061 CCD ICX ICX061 interline C7300 C7300-10 Text: High Performance Digital CCD Camera C7300-10 DATA SHEET ❚ SPECTRAL RESPONSE CHARACTERISTICS 60 Quantum efficiency % 50 40 30 20 10 400 600 800 Wavelength (nm) ▲ Naturally air-cooled (compact) head 1000 * This is typical, not guaranteed. This is a high-resolution, high-sensitivity digital CCD camera that	Original	PDF	C7300-10 SE-171-41 SICS1066E06 MAR/2002 ICX 061 ICX-061 CCD ICX ICX061 interline C7300 C7300-10
intel 82c51 Abstract: UT0.6uCRH UT06MRA010 ltx 600 sizes "rad" asic 400 000 gates UT06MRA050 1553 VHDL 82c51 Text: Semicustom Products UT0.6µCRΗ/SRH Commercial RadHardTM and Strategic RadHardTM Gate Array Family Data Sheet December 2003 FEATURES PRODUCT DESCRIPTION Multiple gate array sizes up to 600,000 usable equivalent gates The high-performance UT0.6µCRH/SRH gate array family	Original	PDF	0E-10 intel 82c51 UT0.6uCRH UT06MRA010 ltx 600 sizes "rad" asic 400 000 gates UT06MRA050 1553 VHDL 82c51
verilog code for UART with BIST capability Abstract: vhdl code for 8 to 3 encoder using concurrent sta 2 port register file open LVDS deserialization IP OC768 ARM10 ARM946 SR40 TLK2201 verilog code for ahb bus slave Text: SR40 0.095-µm High-Speed Copper Standard Cell/Gate Array ASIC Version 1.1 May 17, 2001 Copyright  Texas Instruments Incorporated, 2001 The information and/or drawings set forth in this document and all rights in and to inventions disclosed herein and patents which might be granted thereon disclosing or employing the	Original	PDF	24-hour verilog code for UART with BIST capability vhdl code for 8 to 3 encoder using concurrent sta 2 port register file open LVDS deserialization IP OC768 ARM10 ARM946 SR40 TLK2201 verilog code for ahb bus slave
MCF5206 Abstract: Motorola ColdFire 5202 verilog code 8 bit LFSR MC68000 MC68060 MCF5102 MCF5202 MCF5204 metal scaffold verilog code 16 bit processor Text: Design, Verification, and Test of the ColdFireTM Embedded Microprocessors Al Crouch Jeff Freeman Motorola, Inc. 6501 William Cannon Drive West Austin, Texas 78735-8598 1997 Symposium ColdFire is a trademark of Motorola, Inc. Design, Verification, and Test of the ColdFire Embedded	Original	PDF
grx2 Abstract: 5-8085B T8535 T8536 ctzm Text: Application Note September 2001 Using the T8535B/T8536B Quad Programmable Codec Introduction The Agere Systems Inc. T8536 is a four-channel voiceband codec with digital impedance synthesis. Digital impedance synthesis makes it possible to digitally configure any of the numerous tip/ring termination	Original	PDF	T8535B/T8536B T8536 T8535B/36B T8535 T8535610-712-4106) AP01-071ALC AP01-044ALC) grx2 5-8085B ctzm
4 BIT 2 INPUT MULTIPLEXER Abstract: transistor m5c diode M5C CMLA01 M5C4 grid tie inverter schematic diagram OAI211 AOI21 OAI21 CU240 Text: Order this Data Sheet by M5C/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA M5C SERIES Advanced Information M5C SERIES CMOS ARRAYS The M5C Series arrays feature performance optimized 3.3 V and mixed-voltage I/O capability, high-speed interfaces, and analog PLLs for chip-to-chip clock skew	Original	PDF
MCP8245 Abstract: MPC8245 AN2164 MPC8240 MPC8241 Text: Advance Information MPC8245CE/D Rev. 5.0, 1/2002 MPC8245/MPC8241 RISC Microprocessor Chip Errata This document details all known silicon errata for the MPC8245/MPC8241 and its derivatives. Table 1 provides a revision history for this chip errata document.	Original	PDF	MPC8245CE/D MPC8245/MPC8241 MPC8245/MPC8241 and19 MCP8245 MPC8245 AN2164 MPC8240 MPC8241
1553 VHDL Abstract: UT0.6uCRH ami equivalent gates Text: Semicustom Products UT0.6µ Gate Array Family Data Sheet May 2002 FEATURES PRODUCT DESCRIPTION q Multiple gate array sizes up to 600,000 usable equivalent gates The high-performance UT0.6µ gate array family features densities up to 600,000 equivalent gates and is available in	Original	PDF

tl 0741 Abstract: 2062 USB adc 809 lpg 889 TAG 8734 ao21 ND2D2 schematic diagram display samsung TAG 8518 sj 2517 transistor Text: Introduction 1 Table of Contents 1.1 Library Description . 1-1 1.2 Features . 1-2	Original	PDF	STDL130 tl 0741 2062 USB adc 809 lpg 889 TAG 8734 ao21 ND2D2 schematic diagram display samsung TAG 8518 sj 2517 transistor
TDA 9361 PS Abstract: tda 2974 LD5Q ci 8602 gn block diagram TDA 2265 5.1 AUDIO AMP TDA 2030 TDA 7877 TDA 0200 circuit TDA 9594 TDA 2088 Text: V S MSUNG STD130 ELECTRONICS STD130 Standard Cell 0.18um System-On-Chip ASIC Dec 2000, V2.0 Features 1.8/2.5/3.3V - Leff= 0.15um, Ldrawn = 0.18um Device - Up to 23 million gates - Power dissipation :24nW/MHz 3.3/5.0V - Gate Delay : 48ps @ 1.8V, 1SL Device	Original	PDF	STD130 STD130 24nW/MHz ARM920T/ARM940T, TDA 9361 PS tda 2974 LD5Q ci 8602 gn block diagram TDA 2265 5.1 AUDIO AMP TDA 2030 TDA 7877 TDA 0200 circuit TDA 9594 TDA 2088
CTC 880 Abstract: vhdl coding for analog to digital converter design pure "sine wave" power inverter PURE SINE WAVE inverter schematic diagram sine wave inverter using pic 16C450 16C550 ARM920T ARM940T IEEE1284 Text: Introduction 1 Table of Contents 1.1 Library Description . 1-1 1.2 Features . 1-2	Original	PDF	STD111 CTC 880 vhdl coding for analog to digital converter design pure "sine wave" power inverter PURE SINE WAVE inverter schematic diagram sine wave inverter using pic 16C450 16C550 ARM920T ARM940T IEEE1284
DIGITAL IC TESTER report for project Abstract: atmel 504 IO33 ATC18RHA 4261C virage IO33 Text: Features • Comprehensive Library of Standard Logic and I/O Cells • ATC18RHA Core and IO18 pads Designed to Operate with VDD = 1.8V +/- 0.15V as Main • • • • • • • • • • • • • • Condition IO33 Pad Libraries Provide Interfaces to 3.3+/-0.3V Environments	Original	PDF	ATC18RHA 655Mbps) 4261C DIGITAL IC TESTER report for project atmel 504 IO33 ATC18RHA virage IO33
Gate level simulation without timing Abstract: No abstract text available Text: Verilog Design Flow Composer Schematics Verilog Schematics SystemBuilder PMGPMG PMG models Megacells RAM/ROM models Any Verilog Compliant simulator Behavioural Simulation Synopsys Design Compiler Synthesis and Optimization + Mitel UDC Any Verilog Compliant simulator	Original	PDF
HG71G Abstract: HG73C HG76C LSI12 ieee1149.1 0D001 HG76 Synopsys G003 fastscan Text: 設計環境 7-1 設計環境システムASIC開発フロー仕様設計 RTL機能設計ソフトウェア設計機能検証機能レベルSim. RTLフロアプランタイミング制約ｹﾞｰﾄﾚﾍﾞﾙ設計・検証論理合成パワー計算	Original	PDF	IEEE1149 HG71G HG73C HG76C LSI12 ieee1149.1 0D001 HG76 Synopsys G003 fastscan
80C196 users manual Abstract: IC5050 UTMC Gate Array 1553 VHDL microcontroller using vhdl 54XX 80C196 80C31 UT100 UT200 Text: Semicustom Products UT0.6µ Gate Array Family Data Sheet Jan. 2000 FEATURES PRODUCT DESCRIPTION q Multiple gate array sizes up to 600,000 usable equivalent gates The high-performance UT0.6µ gate array family features densities up to 600,000 equivalent gates and is available in	Original	PDF
pin diagram for IC cd 1619 fm receiver Abstract: ml 1136 triac Transistor 337 DIODE 2216 yagi-uda Antenna bistable multivibrator using ic 555 NEC plasma tv schematic diagram Digital Panel Meter PM 428 555 solar wind hybrid charge controller CLOVER-2000 Text: Index Editor’s Note: Except for commonly used phrases and abbreviations, topics are indexed by their noun names. Many topics are also cross-indexed. The letters “ff” after a page number indicate coverage of the indexed topic on succeeding pages. A separate Projects index follows the main index.	Original	PDF
ARM9TDMI Abstract: ARM1020E samsung hdd Samsung S ARM teaklite DSPG SMART ASIC bga ARM920t datasheet Avant Electronics USB samsung Text: V S MSUNG STDH150 ELECTRONICS STDH150 Standard Cell 0.13um System-On-Chip ASIC Dec 2001, V1.0 Features Analog cores - Ldrawn = 0.13um 1.2/2.5/3.3V Device - Up to 34.3 million gates - Power dissipation:9nW/MHz@1.2V, 2SL, ND2 3.3/5.0V - Gate Delay: 52ps @ 1.2V, 2SL, ND2	Original	PDF	STDH150 STDH150 ARM920T/ARM940T, ARM9TDMI ARM1020E samsung hdd Samsung S ARM teaklite DSPG SMART ASIC bga ARM920t datasheet Avant Electronics USB samsung
CMOS-9HD Abstract: IC Ensemble 130288 upd65342 14047 FO0213 UPD65569 CMOS-10HD Text: 0.25 µm CMOS Gate Array CMOS-10HD Family ray r a e t S ga f 2.5/1.8V O M C o e m g µ a t 5 l vo 0.2 y l d p e e p p u -s r-s h e g i w h o , p al sity n n r e e d t n High ting low i r o p p u S New s t c u Prod FEATURES The CMOS-10HD family is a channel-less gate array to which a 0.25 µm CMOS process has been applied. This family	Original	PDF	CMOS-10HD A15416EJ1V0PF00 CMOS-9HD IC Ensemble 130288 upd65342 14047 FO0213 UPD65569

FASTSCAN Search Results

FASTSCAN Datasheets Context Search

Celaro

nec 10f

5962-96B02

ahb arbiter in mentor

verilog code voltage regulator

ARM dual port SRAM compiler

ICX 061

intel 82c51

verilog code for UART with BIST capability

MCF5206

grx2

4 BIT 2 INPUT MULTIPLEXER

MCP8245

1553 VHDL

tl 0741

TDA 9361 PS

CTC 880

DIGITAL IC TESTER report for project

Gate level simulation without timing

HG71G

80C196 users manual

pin diagram for IC cd 1619 fm receiver

ARM9TDMI

CMOS-9HD