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    EQFP 144 PACKAGE Search Results

    EQFP 144 PACKAGE Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    TPH9R00CQH Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 150 V, 64 A, 0.009 Ohm@10V, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPH2R408QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 120 A, 0.00243 Ohm@10V, SOP Advance Visit Toshiba Electronic Devices & Storage Corporation
    XPH2R106NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 110 A, 0.0021 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    XPH3R206NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 70 A, 0.0032 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    TPH4R008QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 86 A, 0.004 Ohm@10V, SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    XPH13016MC Toshiba Electronic Devices & Storage Corporation P-ch MOSFET, -60 V, -60 A, 0.0099 Ω@-10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation

    EQFP 144 PACKAGE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    eQFP

    Abstract: EQFP 144 PACKAGE 144-EQFP DS-144EQFP-1 MS-026
    Text: Altera Device Package Information 144-Pin Plastic Enhanced Quad Flat Pack EQFP - Wire Bond • ■ ■ All dimensions and tolerances conform to ASME Y14.5M – 1994. Controlling dimension is in millimeters. Pin 1 may be indicated by an ID dot, or a special feature, in its proximity on package


    Original     		PDF 144-Pin MS-026 eQFP EQFP 144 PACKAGE 144-EQFP DS-144EQFP-1

    EQFP 144 PACKAGE

    Abstract: eQFP wire bond E144 package EP3c55 E144 EP3C10 EP3C120 EP3C16 EP3C25
    Text: 15. Package Information for Cyclone III Devices CIII51015-1.1 Introduction This chapter provides package information for Altera Cyclone® III devices, and contains the following sections: • ■ “Thermal Resistance” on page 15–2 “Package Outlines” on page 15–2


    Original     		PDF CIII51015-1 EP3C10 EP3C16 EQFP 144 PACKAGE eQFP wire bond E144 package EP3c55 E144 EP3C10 EP3C120 EP3C16 EP3C25

    EQFP 144 PACKAGE

    Abstract: eQFP E144 package altera cyclone 3 pins altera cyclone 3 E144 EP3C10 EP3C120 EP3C16 EP3C25
    Text: Section 4. Packaging Information This section includes the following chapter: • Revision History Altera Corporation Chapter 15, Package Information for Cyclone III Devices Refer to each chapter for its own specific revision history. For information on when each chapter was


    Original     		PDF CIII51015-1 EQFP 144 PACKAGE eQFP E144 package altera cyclone 3 pins altera cyclone 3 E144 EP3C10 EP3C120 EP3C16 EP3C25

    PCN0714

    Abstract: EQFP-144 XZ074 EQFP 144 PACKAGE altera TQFP 32 PACKAGE ep1k30 pin marking ic 2008 EP1K100 EPF8452A EPF8636A
    Text: Revision: 1.3.0 PROCESS CHANGE NOTIFICATION PCN0714 UPDATE ASSEMBLY PLANT CHANGE FOR PQFP AND TQFP PACKAGES Change Description: This is an update to PCN0714; please see the revision history table for information specific to this update. The plastic quad flat pack PQFP and thin quad flat pack (TQFP) packages currently


    Original     		PDF PCN0714 PCN0714; EP20K100 EP20K60E EP20K100E EP20K160E EP20K200E EP20K300E EPF10K100E EPF10K130E EQFP-144 XZ074 EQFP 144 PACKAGE altera TQFP 32 PACKAGE ep1k30 pin marking ic 2008 EP1K100 EPF8452A EPF8636A

    PCN0904

    Abstract: EP3C16Q240C8N EP3C10E144C8N EP3C16F484C6 ep3C40F484C8N EP3C40F780I7N ep3c16 EP3C25F324C8N EP3C25E144I7N EP3C120F484I7N
    Text: Revision: 1.2.0 PROCESS CHANGE NOTIFICATION PCN0904 Cyclone III Family Process Shrink from 65-nm to 60-nm and Package Bill of Material Change Change Description This is an update to PCN0904, please see revision history table for information specific to this


    Original     		PDF PCN0904 65-nm 60-nm PCN0904, EU-REP3C16U484I7N EP3C10E144C7 EP3C10E144C7N EP3C10E144C8 PCN0904 EP3C16Q240C8N EP3C10E144C8N EP3C16F484C6 ep3C40F484C8N EP3C40F780I7N ep3c16 EP3C25F324C8N EP3C25E144I7N EP3C120F484I7N

    EQFP 144 PACKAGE

    Abstract: BGA and eQFP Package TQFP 144 PACKAGE altera micro fineline BGA eQFP EPC16
    Text: Package dimensions selector guide FineLine BGA FBGA ; Hybrid FineLine BGA (HFBGA) as noted 1,932 1,760 45.00 x 45.00 1.00 1,517 43.00 x 43.00 1.00 1,020 40.00 x 40.00 1.00 896 33.00 x 33.00 1.00 1,508 780 31.00 x 31.00 1.00 40.00 x 40.00 1.00 35.00 x 35.00


    Original     		PDF

    pin information ep3c5

    Abstract: 84 FBGA thermal 144-EQFP ASDO eQFP E144 F256 U256 EQFP 144 PACKAGE
    Text: Pin Information for the Cyclone III EP3C5 Device Version 1.0 Notes 1 , (2) Bank Number VREFB Group Pin Name / Function B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0


    Original     		PDF

    pin information ep3c10

    Abstract: 144-EQFP EQFP 144 PACKAGE E144 EP3C10 F256 U256 CYCLONE III FPGA 10K 144-EQFP
    Text: Pin Information for the Cyclone III EP3C10 Device Version 1.0 Notes 1 ,(2) Bank Number VREFB Group Pin Name / Function B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 B1 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0 VREFB1N0


    Original     		PDF EP3C10 PT-EP3C10-1 pin information ep3c10 144-EQFP EQFP 144 PACKAGE E144 F256 U256 CYCLONE III FPGA 10K 144-EQFP

    EP4CE6 package

    Abstract: EP4CE40 Altera EP4CE6 EP4CE55 5M240Z 5M1270Z QFN148 5m570z 5M40 5M80
    Text: Package Information Datasheet for Altera Devices DS-PKG-16.3 This datasheet provides package and thermal resistance information for Altera devices. Package information includes the ordering code reference, package acronym, leadframe material, lead finish plating , JEDEC outline reference, lead


    Original     		PDF DS-PKG-16 EP4CE6 package EP4CE40 Altera EP4CE6 EP4CE55 5M240Z 5M1270Z QFN148 5m570z 5M40 5M80

    ttl to mini-lvds

    Abstract: mini-lvds connector EQFP-144 mini-lvds point-to-point mini-lvds EP3C16 EP3C55 SSTL-18 EP3C10 EP3C25
    Text: 8. High-Speed Differential Interfaces in Cyclone III Devices CIII51008-1.1 Introduction High-speed differential I/O standards have become popular in high-speed interfaces because of their significant advantages over single-ended I/O standards. In response to the current market need,


    Original     		PDF CIII51008-1 ttl to mini-lvds mini-lvds connector EQFP-144 mini-lvds point-to-point mini-lvds EP3C16 EP3C55 SSTL-18 EP3C10 EP3C25

    TSMC embedded Flash

    Abstract: EQFP 144 PACKAGE pin information ep3c10 cyclone III 484-pin BGA FPGA package point-to-point mini-lvds EP3C25 pin guideline EP3C120 EP3C16 EP3C25 EP3C40
    Text: Cyclone III 65-nm low-cost FPGAs Cyclone III product specs Cyclone III floorplan Phase-locked loops Altera Cyclone® III FPGAs, the newest offering in the Cyclone series of low-cost devices, feature low power and high functionality to deliver more, sooner, and for less—especially for your most cost-sensitive high-volume


    Original     		PDF 65-nm SG-01003-2 TSMC embedded Flash EQFP 144 PACKAGE pin information ep3c10 cyclone III 484-pin BGA FPGA package point-to-point mini-lvds EP3C25 pin guideline EP3C120 EP3C16 EP3C25 EP3C40

    CX3001

    Abstract: CX3000 "CHIP EXPRESS" CX3002 2308 rom CHIPX PQFP ALTERA 160 mentor graphics pads layout ambit circuit CX300
    Text: 15244 ChipExpress W/Tumble Black cyan m a g yellow www.chipexpress.com Chip Express products are protected by one or more of the following U.S. patents: . This information is subject to change without notice. CX3000, HardArray, OneMask, and


    Original     		PDF CX3000, CX3002 CX3141 CX3041 CX3001 CX3000 "CHIP EXPRESS" 2308 rom CHIPX PQFP ALTERA 160 mentor graphics pads layout ambit circuit CX300

    EP4CE15

    Abstract: MS 034 BGA and QFP Altera Package mounting Altera pdip top mark jedec package MO-247 SOIC 20 pin package datasheet QFN "100 pin" PACKAGE thermal resistance Theta JC of FBGA QFN148 EP4CE22
    Text: Altera Device Package Information Datasheet DS-PKG-16.2 This datasheet provides package and thermal resistance information for Altera devices. Package information includes the ordering code reference, package acronym, leadframe material, lead finish plating , JEDEC outline reference, lead


    Original     		PDF DS-PKG-16 EP4CE15 MS 034 BGA and QFP Altera Package mounting Altera pdip top mark jedec package MO-247 SOIC 20 pin package datasheet QFN "100 pin" PACKAGE thermal resistance Theta JC of FBGA QFN148 EP4CE22

    EQFP-144

    Abstract: ttl to mini-lvds SSTL-18 EP3C10 EP3C120 EP3C16 EP3C25 EP3C40 EP3C55 mini-lvds source driver
    Text: Section 2. I/O and External Memory Interfaces This section provides information about Cyclone III device I/O features and high-speed differential and external memory interfaces. This section includes the following chapters: Revision History Altera Corporation


    Original     		PDF

    PQFP 176

    Abstract: 240 pin rqfp drawing EP3C5E144 EP1K50-208 processor cross reference EP3C16F484 MS-034 1152 BGA 84 FBGA thermal TQFP 144 PACKAGE DIMENSION FBGA 1760
    Text: Altera Device Package Information May 2007 version 14.7 Document Revision History Data Sheet Table 1 shows the revision history for this document. Table 1. Document Revision History 1 Date and Document Version May 2007 v14.7 Changes Made ● ● ● ●


    Original     		PDF 144-Pin 100-Pin 256-Pin 780-Pin 256-Pin 68-Pin PQFP 176 240 pin rqfp drawing EP3C5E144 EP1K50-208 processor cross reference EP3C16F484 MS-034 1152 BGA 84 FBGA thermal TQFP 144 PACKAGE DIMENSION FBGA 1760

    point-to-point mini-lvds

    Abstract: EP3CLS200 ttl to mini-lvds EP3CLS150 EP3C40 mini-lvds connector EP3CLS100 mini lvds mini-lvds mini-lvds source driver
    Text: 7. High-Speed Differential Interfaces in the Cyclone III Device Family CIII51008-3.2 This chapter describes the high-speed differential I/O features and resources in the Cyclone III device family. High-speed differential I/O standards have become popular in high-speed interfaces


    Original     		PDF CIII51008-3 point-to-point mini-lvds EP3CLS200 ttl to mini-lvds EP3CLS150 EP3C40 mini-lvds connector EP3CLS100 mini lvds mini-lvds mini-lvds source driver

    cyclone III datasheet

    Abstract: EP3C40 pin definition 8 x8 array multiplier verilog code TSMC Flash E144 EP3C10 EP3C120 EP3C16 EP3C25 EP3C40
    Text: 1. Cyclone III Device Family Overview CIII51001-1.1 Cyclone III: Lowest System-Cost FPGAs The Cyclone III FPGA family offered by Altera is a cost-optimized, memory-rich FPGA family. Cyclone III FPGAs are built on TSMC's 65-nm low-power LP process technology with additional


    Original     		PDF CIII51001-1 65-nm cyclone III datasheet EP3C40 pin definition 8 x8 array multiplier verilog code TSMC Flash E144 EP3C10 EP3C120 EP3C16 EP3C25 EP3C40

    pin information ep3c10

    Abstract: EP3C40F484 EP3c55 EP3C16F484 EP3C16 EP3C40Q240 EP3C40 U256 100 PIN PQFP ALTERA DIMENSION PIN INFORMATION FOR EP3C55
    Text: Cyclone Series Device Thermal Resistance July 2007, version 2.2 Revision History Data Sheet The following table shows the revision history for this data sheet. Date Document Version Changes Made July 2007 2.2 Updated values for EP3C25 E144 device in Table 2.


    Original     		PDF EP3C25 EP3C10 pin information ep3c10 EP3C40F484 EP3c55 EP3C16F484 EP3C16 EP3C40Q240 EP3C40 U256 100 PIN PQFP ALTERA DIMENSION PIN INFORMATION FOR EP3C55

    EQFP-144

    Abstract: FBGA-484 datasheet mini-lvds source driver EP3C10 EP3C16 SSTL-18 JTAG series termination resistors HSTL-12
    Text: 6. I/O Features in the Cyclone III Device Family CIII51007-3.2 This chapter describes the I/O features offered in the Cyclone III device family Cyclone III and Cyclone III LS devices . The I/O capabilities of the Cyclone III device family are driven by the diversification


    Original     		PDF CIII51007-3 EQFP-144 FBGA-484 datasheet mini-lvds source driver EP3C10 EP3C16 SSTL-18 JTAG series termination resistors HSTL-12

    CY3LV010

    Abstract: 38K30 CYDH2200E 38K50
    Text: Quantum38K ISR™ CPLD Family PRELIMINARY CPLDs at ASIC Prices™ Features • High density — 30K to 100K usable gates — 512 to 1536 macrocells — 136 to 302 maximum I/O pins — Eight Dedicated Inputs including four clock pins and four global I/O control signal pins; four JTAG interface pins for reconfigurability/boundary scan


    Original     		PDF Quantum38KTM Quantum38K CY38K100 208-pin 208EQFP) CY3LV010 38K30 CYDH2200E 38K50

    pin information ep3c10

    Abstract: u256 EP2C35-F484 E144 EP3C10 EP3C16 EP3C25 F256 M164
    Text: Cyclone Series Device Thermal Resistance May 2008, version 3.0 Revision History Data Sheet The following table shows the revision history for this data sheet. Date Document Version Changes Made May 2008 3.0 Updated Tables 2, 4, and 5. July 2007 2.2 Updated values for EP3C25 E144 device in Table 2.


    Original     		PDF EP3C25 EP3C10 pin information ep3c10 u256 EP2C35-F484 E144 EP3C10 EP3C16 EP3C25 F256 M164

    DY6009

    Abstract: DY6020 DY6035 DY6055 DynaChip IO258 dy6000-family
    Text: DY6000 Family FAST Field Programmable Gate Array™ Features • • • • • • • • • • • • • • • • • • • • • Predictable, Fast, Patented Active Repeater™ Architecture I/O Data-Transfer Rates up to 200MHz 2.7ns I/O Clock-to-Output Time with 10pf Load;


    Original     		PDF DY6000TM 200MHz 32-Bit 125MHz 8MHz-to-200MHz 200ps 150ps DY6000, DL5000, DY6000 DY6009 DY6020 DY6035 DY6055 DynaChip IO258 dy6000-family

    daewon tray

    Abstract: Daewon T0809050 daewon tray 1F1-1717-AXX strapack s-669 DAEWON tray 48 DAEWON JEDEC TRAY DAEWON FBGA KS-88085 1F1-1717-AXX tray bga
    Text: Guidelines for Handling J-Lead, QFP, BGA, FBGA, and Lidless FBGA Devices AN-071-5.0 Application Note This application note provides guidelines for handling J-Lead, Quad Flat Pack QFP , and Ball-Grid Array (BGA, including FineLine BGA [FBGA] and lidless FBGA


    Original     		PDF AN-071-5 Hand-0444 daewon tray Daewon T0809050 daewon tray 1F1-1717-AXX strapack s-669 DAEWON tray 48 DAEWON JEDEC TRAY DAEWON FBGA KS-88085 1F1-1717-AXX tray bga

    DY8020

    Abstract: DY8035 DY8055 DY8080 371n A1304
    Text: DY8000 Family The Fastest Route to Wire Speed Features • • • • • • • • • • • • • • • • • • Applications Examples Up to 6,272 Logic Cells Patented Active Repeater Architecture 5 x 7 Routing Region - Access 35 Logic Blocks


    Original     		PDF DY8000 66MHz, 64-Bit, 250MHz 32-Bit DY8000, DL5000, DY8020 DY8035 DY8055 DY8080 371n A1304