Device-List
Abstract: cf745 04 p 24LC211 lattice im4a3-32 CF775 MICROCHIP 29F008 im4a3-64 ks24c01 ep320ipc ALL-11P2
Text: Device List Adapter List Converter List for ALL-11 JUL. 2000 Introduction T he Device List lets you know exactly which devices the Universal Programmer currently supports. The Device List also lets you know which devices are supported directly by the standard DIP socket and which
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ALL-11
Z86E73
Z86E83
Z89371
ADP-Z89371/-PL
Z8E000
ADP-Z8E001
Z8E001
Device-List
cf745 04 p
24LC211
lattice im4a3-32
CF775 MICROCHIP
29F008
im4a3-64
ks24c01
ep320ipc
ALL-11P2
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PDN9516
Abstract: EP320IPC-35 EP320IPC-40 ep320Ipc EPM5016PC EP320IPC-30 EP320IDC ep320ipi-35 EP320IDC-35 EPX740LC68
Text: PRODUCT DISCONTINUANCE NOTICE SELECTED DEVICES TO BECOME OBSOLETE During 1996 and 1997 Altera will be discontinuing selected devices. A summary of the devices affected and last order/last shipment dates are listed in Table 1; a list of affected ordering codes
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D-83224
PDN9516
EP320IPC-35
EP320IPC-40
ep320Ipc
EPM5016PC
EP320IPC-30
EP320IDC
ep320ipi-35
EP320IDC-35
EPX740LC68
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pipelined adder
Abstract: No abstract text available
Text: Application Note 36 Designing with FLEX 8000 Devices Designing with FLEX 8000 Devices May 1994, ver. 2 Application Note 36 Historically, programmable logic devices have fallen into two broad categories: Erasable Programmable Logic Devices EPLDs and FieldProgrammable Gate Arrays (FPGAs). Widespread use of both EPLDs and
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16cudslr
Abstract: EP320I EPM7160 Transition vhdl code for lift controller EPM9560 ep330 INTEL 8-series NEC 9801 altera ep220 Silicon Laboratories
Text: M+2Book Page i Thursday, June 12, 1997 12:49 AM MAX+PLUS II Programmable Logic Development System Getting Started Altera Corporation 2610 Orchard Parkway San Jose, CA 95134-2020 408 894-7000 M+2TOC+ Page iii Monday, June 9, 1997 9:34 AM Contents Preface
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EPF8282
Abstract: No abstract text available
Text: PLS-WEB Installation Instructions September 1998, ver. 1 Before You Install Before you install the PLS-WEB version 9.01 software, you must have both the PLS-WEB self-extracting executable file plsweb.exe and a license file (license.dat). You can obtain the software from this CD-ROM and the
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schematic diagram atx Power supply 500w
Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455
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P462-ND
P463-ND
LNG295LFCP2U
LNG395MFTP5U
US2011)
schematic diagram atx Power supply 500w
pioneer PAL 012A
1000w inverter PURE SINE WAVE schematic diagram
600va numeric ups circuit diagrams
winbond bios 25064
TLE 9180 infineon
smsc MEC 1300 nu
TBE schematic diagram inverter 2000w
DK55
circuit diagram of luminous 600va UPS
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Untitled
Abstract: No abstract text available
Text: AN Ù 1=! n ^ !S \ Contents September 1991 Section 5 STG & SAM EPLDs STG & SAM EPLDs: Synchronous State M achine & W aveform G eneration D evices. 189 EPS464 STG EPLD: Synchronous Tim ing G e n e ra to r.191
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EPS464
EPS448
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EPLD
Abstract: No abstract text available
Text: EPS464 EPLD Overview Features For detailed inform ation, refer to “ EPS464 EPLD” in this data sheet. □ □ □ □ □ High-performance, globally-routed, general-purpose EPLD Combinatorial speeds as fast as 20 ns Counter frequencies up to 67 MHz Pipelined data rates up to 71 MHz
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EPS464
250-m
44-pin
ALTED001
EPLD
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Untitled
Abstract: No abstract text available
Text: M PS464 MPLD Features □ □ □ □ □ □ □ □ General Description C M O S, M a sk -P ro g ra m m e d L o g ic D ev ice M PL D id eal for implementing synchronous timing logic functions High-volume replacement for EPS464 EPLD designs Zero-pow er operation (typically 15 |aA standby)
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PS464
EPS464
71-MHz
44-pin
MPS464
16-bit
MPS464
Page262
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Untitled
Abstract: No abstract text available
Text: EPS464 STG EPLD Synchronous Timing Generator September 1991, ver. 2 Data Sheet F e a t u TGS □ □ □ □ □ □ □ □ H igh-perform ance Synchronous Tim ing G enerator STG EPLD ideal for custom w aveform generation and state m achine designs G enerates com plex control tim ing w aveform s for im aging and display
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EPS464
250-m
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Untitled
Abstract: No abstract text available
Text: EPS464 STG EPLD M b r iü ^ a Synchronous Timing Generator \ Data Sheet Septem ber 1991, ver. 2 □ □ □ □ □ □ □ □ □ H igh-perform ance Synchronous T im ing G enerator STG EPLD ideal for custom w aveform generation and state m achine designs
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EPS464
250-mV
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eps448
Abstract: No abstract text available
Text: STG& SAM _ EPLDs Synchronous State Machine & Wavefonn Generation Devices User I/O EPS464: Synchronous Timing Generator EPS448: Stand-Alone Microsequencer □ G enerates com plex control timing waveforms for all types of imaging applications CCD im agers, video
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EPS464:
66-MHz
44-pin
30-MHz
28-pin,
300-mil
eps448
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ATIC 64 C1
Abstract: No abstract text available
Text: EPS464 EPLD □ High-performance, globally-routed, general-purpose EPLD Combinatorial speeds as fast as 20 ns Counter frequencies up to 67 MHz Pipelined data rates up to 71 MHz 64 enhanced m acrocells and 256 shared expander product terms "exp an d ers" ; ideal for custom w aveform generation and state
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EPS464
250-m
EPS464-20,
EPS464-25
ALTED001
ATIC 64 C1
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ALTERA MAX 5000
Abstract: EPM5016 jlcc 32 R program EPM5032 epm5128a ALTERA MAX 5000 programming
Text: M A X 5 0 00/EPS464 Programmable Logic Device Family Data Sheet August 1993, ver. 1 □ Features □ □ □ □ □ □ □ □ □ Advanced M ultiple Array M atrix MAX 5000/E P S464 architecture com bining speed and ease-of-use of PAL devices with density of
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00/EPS464
5000/E
20-pin
100-pin
65-micron
12-ns
ALTED001
ALTERA MAX 5000
EPM5016
jlcc 32 R
program EPM5032
epm5128a
ALTERA MAX 5000 programming
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Untitled
Abstract: No abstract text available
Text: EPS464 Synchronous Timing Generator EPLD Data Sheet April 1991, ver. 1 Features ^ □ □ □ □ □ □ □ □ H igh-perform ance Synchronous Tim ing Generator STG EPLD ideal for custom w aveform generation and state m achine designs Generates com plex control timing w aveform s for im aging and display
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EPS464
50-MHz
250-mV
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programmer EPLD
Abstract: EPM5000-series EPM5000 EPS464-25 AC01 EPS464-20 logicaps EPM500 waveform-generation
Text: EPS464 Synchronous Timing Generator EPLD Data Sheet April 1991, ver. 1 F g g tlir & S ^ □ □ □ □ □ □ □ □ H igh-perform ance Synchronous Tim ing Generator STG EPLD ideal for custom w aveform generation and state m achine designs Generates com plex control timing w aveform s for im aging an d display
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EPS464
F63tlir6S
50-MHz
250-mV
programmer EPLD
EPM5000-series
EPM5000
EPS464-25
AC01
EPS464-20
logicaps
EPM500
waveform-generation
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J-Lead, QFP ceramic
Abstract: PQFP 176 J-Lead
Text: EPM5192A EPLD □ Features □ □ Preliminary Information □ □ □ High-performance, second-generation MAX 5000 EPLD developed on an advanced 0.65-m icron CM OS EPROM process High-speed upgrade for existing EPM 5192 designs High-speed multi-LAB architecture
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EPM5192A
74-series
84-pin
100-Pin
ALTED001
J-Lead, QFP ceramic
PQFP 176 J-Lead
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EPM5128LC
Abstract: epm5128jc MPM5128LC
Text: MPLDs Mask-Programmed Logic Devices Data Sheet September 1991, ver. 1 □ □ □ Features □ □ □ □ □ □ General Description Masked versions of EPLD designs Reduced cost for large-volume applications Available for EP1810, EPM5032, EPM5064, EPM5128, EPM5130,
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EP1810,
EPM5032,
EPM5064,
EPM5128,
EPM5130,
EPM5192,
EPS464
EPM5128LC
epm5128jc
MPM5128LC
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Untitled
Abstract: No abstract text available
Text: FLEX EPF81188 Zi!hlU&\ 12,000-Gate Programmable Logic Device Data Sheet September 1992, ver. 1 Features □ □ □ Preliminary Information □ □ □ □ □ High-density, register-rich program m able logic device 12,000 usable gates, 1,188 registers 180 I /O pins and 4 dedicated inputs
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EPF81188
000-Gate
232-pin
240-pin
70-MHz
16-bit
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programming manual EPLD EPS448
Abstract: Altera EPM5128 EPM7064-12 leap u1 EP-900910 PLE3-12a tcl tv circuit altera eplds EP610 "pin compatible" ALTERA MAX 5000
Text: Data Book TENTH ANNIVERSARY A Decade of Leadership A u g u s t 1993 Data Book August 1993 A-DB-0793-01 Altera, MAX, and M A X+PLUS are registered trademarks of Altera Corporation. The following, among others, are trademarks of Altera Corporation: AHDL, M AX+PLUS II, PL-ASAP2, PLDS-HPS, PLS-ADV, PLS-ES, PLS-FLEX8, PLS-FLEX8/H P, PLS-FLEX8/SN , PLS-HPS, PLS-STD, PLS-W S/H P,
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-DB-0793-01
EP330,
EP610,
EP610A,
EP610T,
EP910,
EP910A,
EP910T,
EP1810,
EP1810T,
programming manual EPLD EPS448
Altera EPM5128
EPM7064-12
leap u1
EP-900910
PLE3-12a
tcl tv circuit
altera eplds
EP610 "pin compatible"
ALTERA MAX 5000
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EPM5128JC
Abstract: EPM5064 EPM5130 Altera EPM5128 Altera September 1991
Text: ANU MPLDs Mask-Programmed Logic Devices September 1991, ver. 1 Data Sheet Features □ □ □ □ □ □ □ □ □ General Description M asked versions of EPLD designs Reduced cost for large-volum e applications A vailable for E P1810, EPM 5032, E PM 5064, EPM 5128, EPM 5130,
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EP1810,
EPM5032,
EPM5064,
EPM5128,
EPM5130,
EPM5192,
EPS464
EPM5128JC
EPM5064
EPM5130
Altera EPM5128
Altera September 1991
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program EPM5032
Abstract: EPLD 5032 VC 5032
Text: EPM 5032 EPLD Features □ H ig h -sp eed , sin gle-L A B M A X 5000 E PL D t PD as fast as 15 ns C ou n ter frequ en cies up to 77 M H z P ip elined d ata rates up to 83 M H z 32 in d iv id u ally con fig u rab le m acrocells 64 sh areab le exp an d er p ro d u ct term s "e x p a n d e rs " allo w in g 68
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EPM5032
-883-C
-883-com
ALTED001
program EPM5032
EPLD 5032
VC 5032
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EPM5064
Abstract: EPM5064-1
Text: EPM5064 EPLD Features □ □ □ □ □ □ High-density, 64-macrocell, general-purpose MAX 5000 EPLD High-speed multi-LAB architecture tPD as fast as 25 ns Counter frequencies up to 50 MHz Pipelined data rates up to 63 MHz 128 shareable expander product terms "expanders" allowing over
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EPM5064
64-macrocell,
44-pin
EPS464
ALTED001
EPM5064-1
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epf8282 hardware
Abstract: epf8282 block pf815 EPF81188 PF8150 EPF8282
Text: FLEX 8000 Programmable Logic Device Family Datasheet August 1993, ver. 3 Features □ □ □ □ □ □ □ □ □ □ □ □ High-density, register-rich programmable logic device family 2,500 to 24,000 usable gates 282 to 2,252 registers Fabricated on a 0.8-m icron CM OS SRAM technology
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ALTED001
epf8282 hardware
epf8282 block
pf815
EPF81188
PF8150
EPF8282
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