EPM5016
Abstract: EPMS016
Text: EPM5016 EPLD Features □ □ □ □ □ □ □ □ General Description High-speed 20-pin DIP, J-lead, or SOIC single-LAB MAX 5000 EPLD Combinatorial speeds with tPD = 15 ns Counter frequencies up to 100 MHz Pipelined data rates up to 100 MHz 16 individually configurable macrocells
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EPM5016
20-pin
24-mA
300-mil
16-bit
EPM5016-15,
EPM5016-17,
EPM5016-20
EPMS016
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EPM5016
Abstract: rs flip-flop IC 7400 EPMS016 EPM5128 PACKAGING
Text: EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ Complete fam ily of C M O S E P L D s solves design tasks ranging from fast 20-pin address decoders to 100-pin LSI custom peripherals. The advanced M A X 5000 architecture combines the speed, ease of use,
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EPM5016
EPM5192
20-pin
100-pin
15-ns
rs flip-flop IC 7400
EPMS016
EPM5128 PACKAGING
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