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    EP910I Search Results

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    EP910ILC-15 Rochester Electronics LLC OT PLD, 18ns, CMOS, PQCC44, PLASTIC, LCC-44 Visit Rochester Electronics LLC Buy
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    Rochester Electronics LLC EP910ILC-12

    IC PLD 16MC 12NS 28PLCC
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    Rochester Electronics LLC EP910ILI-12

    IC PLD 16MC 12NS 28PLCC
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    Altera Corporation EP910ILC-15

    Simple EPLD, Programmable Array Logic, 44 Pin, Plastic, PLCC
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    Quest Components EP910ILC-15 2
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    EP910I Datasheets (27)

    Part ECAD Model Manufacturer Description Curated Type PDF
    EP910I-12 Altera High-performance, 16-macrocell Classic EPLD Original PDF
    EP910I-12 Altera Classic EPLD Family Scan PDF
    EP910I-12CERDIP40 Altera SPLD Original PDF
    EP910I-12PDIP40 Altera SPLD Original PDF
    EP910I-12PLCC44 Altera SPLD Original PDF
    EP910I-15 Altera High-performance, 24-macrocell Classic EPLD Original PDF
    EP910I-15 Altera Classic EPLD Family Scan PDF
    EP910I-15CERDIP40 Altera SPLD Original PDF
    EP910I-15PDIP40 Altera SPLD Original PDF
    EP910I-15PLCC44 Altera SPLD Original PDF
    EP910I-25 Altera High-performance, 24-macrocell Classic EPLD Original PDF
    EP910I-25 Altera Classic EPLD Family Scan PDF
    EP910I-25CERDIP40 Altera SPLD Original PDF
    EP910I-25PDIP40 Altera SPLD Original PDF
    EP910I-25PLCC44 Altera SPLD Original PDF
    EP910IDC-15 Altera CPLD, EP910 Family, ECMOS Process, 450 Gates, 24 Macro Cells, 24 Reg., 24 User I/Os, 5V Supply, 15 Speed Grade, 40DIP Original PDF
    EP910IDC-15N Altera IC CPLD 24MACROCELL 450GATE 15NS LE 5V 40PDIP Scan PDF
    EP910IDI-15 Altera CPLD, EP910 Family, ECMOS Process, 450 Gates, 24 Macro Cells, 24 Reg., 24 User I/Os, 5V Supply, 15 Speed Grade, 40DIP Original PDF
    EP910ILC-12 Altera CPLD, EP910 Family, ECMOS Process, 450 Gates, 24 Macro Cells, 24 Reg., 24 User I/Os, 5V Supply, 12 Speed Grade, 44LDCC Original PDF
    EP910ILC-12N Altera IC CPLD 24MACROCELL 450GATE 12NS LE 5V 44 pin PLCC Scan PDF

    EP910I Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    PDN0102

    Abstract: EP910LC EP1810LC-45H PDN01
    Text: PRODUCT DISCONTINUANCE NOTICE SELECTED CLASSIC DEVICES Altera will be discontinuing selected Classic family devices shown below . Discontinued Ordering Codes EP910ILC-15H EP910LC-40H EP1810LC-45H EP1810LC-35H C.F. – Call Factory Compatible Substitute C.F.


    Original     		PDF EP910ILC-15H EP910LC-40H EP1810LC-45H EP1810LC-35H PDN0102 PDN0102 EP910LC EP1810LC-45H PDN01

    vhdl code for multiplexer 16 to 1 using 4 to 1

    Abstract: vhdl code for D Flipflop processor control unit vhdl code download PLE3-12 vhdl code for 8 bit common bus pci master verilog code fifo vhdl system design using pll vhdl code usb interface 1996 BGA and QFP Package
    Text: Glossary May 1999 A Altera Consultants Alliance Program ACAP An alliance created to provide expert design assistance to users of Altera® programmable logic devices (PLDs). ACAPSM consultants provide their expertise and services to designers. Altera Hardware Description Language (AHDL)


    Original     		PDF

    PDN0510

    Abstract: epm7128stc100 EP1800LC-3H EPM7064BUC49-5 EP900ILC-50 EPM7032QI44-15 EPM7192QI160-3 EPM7160EQC100-10P EPM9560ARC208-10 EPM7128BTI100-7
    Text: Page 1 of 7 PRODUCT DISCONTINUANCE NOTIFICATION PDN0510 Change Description: Altera will be discontinuing the APEX 20K, APEX 20KC, APEX 20KE, APEX II, Classic™, configuration device, FLEX 10KA, FLEX 10KE, FLEX 6000, FLEX 8000, MAX® 7000, MAX 7000A, MAX 7000B, MAX 7000S, and MAX 9000 ordering codes listed


    Original     		PDF PDN0510 7000B, 7000S, re064STC100-5F EPM7064STC100-6F EPM7064STC44-5F EPM7064STC44-7F EPM7128SLC84-6F EPM7128SQC160-15F EPM7128SQC160-6F PDN0510 epm7128stc100 EP1800LC-3H EPM7064BUC49-5 EP900ILC-50 EPM7032QI44-15 EPM7192QI160-3 EPM7160EQC100-10P EPM9560ARC208-10 EPM7128BTI100-7

    Device-List

    Abstract: cf745 04 p 24LC211 lattice im4a3-32 CF775 MICROCHIP 29F008 im4a3-64 ks24c01 ep320ipc ALL-11P2
    Text: Device List Adapter List Converter List for ALL-11 JUL. 2000 Introduction T he Device List lets you know exactly which devices the Universal Programmer currently supports. The Device List also lets you know which devices are supported directly by the standard DIP socket and which


    Original     		PDF ALL-11 Z86E73 Z86E83 Z89371 ADP-Z89371/-PL Z8E000 ADP-Z8E001 Z8E001 Device-List cf745 04 p 24LC211 lattice im4a3-32 CF775 MICROCHIP 29F008 im4a3-64 ks24c01 ep320ipc ALL-11P2

    PCN0702

    Abstract: SUMITOMO G700 SUMITOMO G600 SUMITOMO EME G700 sumitomo 6300h mold compound SUMITOMO EME G600 EME G600 material properties G600 mold compound mp8000ch4 sumitomo G700 Tg
    Text: Revision: 1.2.0 PROCESS CHANGE NOTIFICATION PCN0702 UPDATE MOLD COMPOUND CHANGE FOR PQFP, PDIP, AND RQFP PACKAGES Change Description: This is an update to PCN0702, published March, 2007. Altera is implementing mold compound material changes on the Plastic Quad Flat Pack PQFP , Plastic Dual In-Line


    Original     		PDF PCN0702 PCN0702, 6300HJ G700M PCN0702 MP8000CH4 48hrs) X10-5 UL-94 SUMITOMO G700 SUMITOMO G600 SUMITOMO EME G700 sumitomo 6300h mold compound SUMITOMO EME G600 EME G600 material properties G600 mold compound sumitomo G700 Tg

    tms 3899

    Abstract: lot Code Formats altera cyclone EPC8 bios fail EPM3032 EP1C12F
    Text: Section I. Cyclone FPGA Family Data Sheet This section provides designers with the data sheet specifications for Cyclone devices. The chapters contain feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information,


    Original     		PDF 7000B tms 3899 lot Code Formats altera cyclone EPC8 bios fail EPM3032 EP1C12F

    EPF10K10

    Abstract: EPF10K100 EPF10K20 EPF10K30 EPF10K40 EPF10K50 EPF10K70 EPF8282A EPF8282AV ALTERA MAX 5000
    Text: June 1996, ver. 3 Introduction Data Sheet This selection guide lists the available system-level features and devices from Altera: • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ f Component Selection Guide System-level features FLEX 10K devices FLEX 8000 devices


    Original     		PDF EPM7128E EPM7160E EPM7128S EPM7160S EPM7192E EPM7256E EPF10K10 EPF10K100 EPF10K20 EPF10K30 EPF10K40 EPF10K50 EPF10K70 EPF8282A EPF8282AV ALTERA MAX 5000

    16cudslr

    Abstract: EP320I EPM7160 Transition vhdl code for lift controller EPM9560 ep330 INTEL 8-series NEC 9801 altera ep220 Silicon Laboratories
    Text: M+2Book Page i Thursday, June 12, 1997 12:49 AM MAX+PLUS II Programmable Logic Development System Getting Started Altera Corporation 2610 Orchard Parkway San Jose, CA 95134-2020 408 894-7000 M+2TOC+ Page iii Monday, June 9, 1997 9:34 AM Contents Preface


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: Classic EPLD Family January 1998, ver. 4 Features Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ Complete device family with logic densities of 300 to 900 usable gates see Table 1 Device erasure and reprogramming with advanced, non-volatile EPROM configuration elements


    Original     		PDF

    53413

    Abstract: 58725 632367 594971
    Text: Altera Digital Library CD-ROM December 2002 CD-ADL2002-4.0 Legal Notice This CD ROM contains documentation and other information related to products and services of Altera Corporation “Altera” which is provided as a courtesy to Altera’s customers and potential customers. By copying or using any information contained on this CD ROM, you agree to be bound by the


    Original     		PDF CD-ADL2002-4 Incorpora6596; RE37060; RE35977; 53413 58725 632367 594971

    BC 1098

    Abstract: EPM7384 ALTERA 68 PLCC t187
    Text: Altera Device Package Information June 1998, ver. 7.01 Introduction Data Sheet This data sheet provides the following package information for all Altera¨ devices: • ■ ■ ■ Lead materials Thermal resistance Package weights Package outlines In this data sheet, packages are listed in order of ascending pin count.


    Original     		PDF 232-pin 240-pin 100-pin 256-pin 484-pin 672-pin BC 1098 EPM7384 ALTERA 68 PLCC t187

    EP4CE6 package

    Abstract: EP4CE40 Altera EP4CE6 EP4CE55 5M240Z 5M1270Z QFN148 5m570z 5M40 5M80
    Text: Package Information Datasheet for Altera Devices DS-PKG-16.3 This datasheet provides package and thermal resistance information for Altera devices. Package information includes the ordering code reference, package acronym, leadframe material, lead finish plating , JEDEC outline reference, lead


    Original     		PDF DS-PKG-16 EP4CE6 package EP4CE40 Altera EP4CE6 EP4CE55 5M240Z 5M1270Z QFN148 5m570z 5M40 5M80

    PQFP 176

    Abstract: 240 pin rqfp drawing EP3C5E144 EP1K50-208 processor cross reference EP3C16F484 MS-034 1152 BGA 84 FBGA thermal TQFP 144 PACKAGE DIMENSION FBGA 1760
    Text: Altera Device Package Information May 2007 version 14.7 Document Revision History Data Sheet Table 1 shows the revision history for this document. Table 1. Document Revision History 1 Date and Document Version May 2007 v14.7 Changes Made ● ● ● ●


    Original     		PDF 144-Pin 100-Pin 256-Pin 780-Pin 256-Pin 68-Pin PQFP 176 240 pin rqfp drawing EP3C5E144 EP1K50-208 processor cross reference EP3C16F484 MS-034 1152 BGA 84 FBGA thermal TQFP 144 PACKAGE DIMENSION FBGA 1760

    EPM5032

    Abstract: EPM5130 RE35 744 220 altera EPM7032S EPC1 EPM5032 max EPM5192 epm7192 EP20K100
    Text: Altera Digital Library CD-ROM March 2000 P-CD-ADL2000-01 Legal Notice This CD contains documentation and other information related to products and services of Altera Corporation “Altera” which is provided as a courtesy to Altera’s customers and potential customers. By copying or using any information contained on this CD, you agree to be bound by the terms


    Original     		PDF P-CD-ADL2000-01 EPM5032 EPM5130 RE35 744 220 altera EPM7032S EPC1 EPM5032 max EPM5192 epm7192 EP20K100

    FC SUFFIX altera

    Abstract: No abstract text available
    Text: Classic EPLD Family Data Sheet M arch 1995, ver. 2 Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ Table 1. Classic Device Features Feature EP22V10 EP22V10E EPB10 EP610T EP610I EP910 EP910T EP910I EP1810 EP1810T Available gates 400 600 600 900 900 1,800 Usable gates


    OCR Scan     		PDF

    Signal Path Designer

    Abstract: No abstract text available
    Text: Classic EPLD Family J a n u a ry 1998. ver. Features Data Sheet 4 * • ■ ■ ■ ■ ■ ■ ■ Table 1. Classic Device Features EP610 EP610I EP910 EP910I EP1810 300 450 900 Macrocells 16 24 48 Maximum user I/O pins 22 38 64 Feature Usable gates Altera Corporation


    OCR Scan     		PDF

    altera ep900i

    Abstract: IC MSI ADDER
    Text: EP910 EPLD Features High-performance, 24-macrocell Classic EPLD Combinatorial speeds with tPD as low as 12 ns Counter frequencies of up to 76.9 MHz Pipelined data rates of up to 125 MHz Programmable I/O architecture with up to 36 inputs or 24 outputs EP910, EP910I, and EP900I devices that are pin-, function, and


    OCR Scan     		PDF EP910 24-macrocell EP910, EP910I, EP900I 44-pin 40-pin 24-bit altera ep900i IC MSI ADDER

    7483 adder/subtractor

    Abstract: ic 7483 full adder ttl 7483 FULL ADDER of IC 7483 7483 full adder 7483 adder
    Text: Understanding MAX 5000 & Classic Timing January 1998, ver. 2 Introduction A pplication Note 78 Altera devices provide performance that is consistent from simulation to application. Before programming a device, you can determine the worstcase timing delays for any design. You can calculate propagation delays


    OCR Scan     		PDF

    EP610-25

    Abstract: programmer EPLD EP1810 EP610 EP910 ep910 programmer QLCC 24 EP6101-10
    Text: Classic E P L D F a m ily Ja n u a ry 1098, ve r 4 Features Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ C om plete device fam ily w ith logic densities o f 300 to 9 X usable gates (see Table 1) D evice e ra su re an d reprogram m ing w ith advanced, non-volatile


    OCR Scan     		PDF of300 EP1810 68-pin EP610-25 programmer EPLD EP610 EP910 ep910 programmer QLCC 24 EP6101-10

    EP22V10

    Abstract: EP22V10E altera ep22v10e ep22v10 epld
    Text: EP22V10 EPLD Features • High-performance, 10-macrocell Classic EPLD Combinatorial speeds with tPD as low as 7.5 ns Counter frequencies of up to 111.1 MHz Pipelined data rates of up to 109.8 MHz 1.0-micron CMOS technology with EPROM configuration elements


    OCR Scan     		PDF EP22V10 10-macrocell 22V10 EP22V10E) 24-pin 28-pin 10-bit 00D4310 EP22V10E altera ep22v10e ep22v10 epld

    EP910

    Abstract: altera EP910
    Text: EP910 EPLD Features • ■ ■ ■ ■ ■ High-performance, 24-macrocell Classic EPLD Combinatorial speeds with tPD as low as 12 ns Counter frequencies of up to 100 MHz Pipelined data rates of up to 100 MHz Programmable I/O architecture with up to 36 inputs or 24 outputs


    OCR Scan     		PDF EP910 24-macrocell EP910, EP910T, EP910I 44-pin 40-pin 24-bit altera EP910

    P6102

    Abstract: EP6101-10
    Text: Classic EPLD Family J a n u ary 1998. v er. J Features Data S h e e t • ■ ■ ■ ■ ■ ■ ■ ■ ■ Complete device family w ith logic densities of 300 to 900 usable gates see Table 1 Device erasure and reprogram m ing w ith advanced, non-volatile


    OCR Scan     		PDF

    EP1800I

    Abstract: 8946801XC epm5130 epx780 EPX740 EP224 Altera EP1800i
    Text: Component Selection Guide March 1995, ver. 2 Introduction Data Sheet This selection guide lists devices available from Altera: • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ FLEX 10K devices FLEX 8000 devices Configuration EPROM devices MAX 9000 devices


    OCR Scan     		PDF 7000S EP1800I 8946801XC epm5130 epx780 EPX740 EP224 Altera EP1800i

    Untitled

    Abstract: No abstract text available
    Text: Classic EPLD Family June 1996, ver. 3 Features Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ Table 1. Classic Device Features Feature EP1810 900 300 450 16 24 48 Maximum user I/O pins 22 38 64 tp D n s 10 12 20 100 76.9 50 f CNT A-DS-CLASSIC-03 EP910 &


    OCR Scan     		PDF