F10014
Abstract: ECL Handbook F10506 ECL 200 F10105 f10107 F10-100 f10504
Text: F10014 ACTIVE TERMINATOR F10K VOLTAGE COMPENSATED ECL G E N ER A L D ESC R IP TIO N — The F10014 Is a voltage com pensated ECL circuit w h ich replaces discrete diode clam ping circuits at considerable reduction in cost, board space and power dissipation. It operates from the standard - 5 . 2 V ECL
|
OCR Scan
|
F10014
F10014
F10118
F10518
F10119
F1Q519
F10121
F10521
ECL Handbook
F10506
ECL 200
F10105
f10107
F10-100
f10504
|
PDF
|
application of programmable array logic
Abstract: preset resistor 10k specification of logic analyser 10H20EV8-4A preset variable resistor preset variable resistor 100k 10020EV8 10H20EV8 macrocell ecl
Text: Philips Semiconductors Programmable Logic Devices Product specification ECL programmable array logic DESCRIPTION The 10H20EV8/10020EV8 is an ultra high-speed universal ECL PAL device. Combining versatile output macrocells with a standard AND/OR single programmable
|
Original
|
10H20EV8/10020EV8
application of programmable array logic
preset resistor 10k
specification of logic analyser
10H20EV8-4A
preset variable resistor
preset variable resistor 100k
10020EV8
10H20EV8
macrocell ecl
|
PDF
|
SN65LVDS108
Abstract: SN65LVDS116
Text: Interface Data Transmission Texas Instruments Incorporated Power consumption of LVPECL and LVDS By Chris Sterzik Applications Specialist, Interface Products Introduction Figure 1. Models of ECL and LVDS output drivers and terminations Single-ended emitter-coupled logic (ECL) has
|
Original
|
SLYT127
SN65LVDS108
SN65LVDS116
|
PDF
|
AN1406
Abstract: MECL System Design Handbook DL140 signal path designer
Text: AN1406 Application Note Designing With PECL ECL at +5.0V Prepared by Cleon Petty Todd Pearson ECL Applications Engineering This application note provides detailed information on designing with Positive Emitter Coupled Logic (PECL) devices. 2/98 Motorola, Inc. 1998
|
Original
|
AN1406
AN1406/D
DL140
AN1406
MECL System Design Handbook
signal path designer
|
PDF
|
LQFP32
Abstract: MC100EP210 PCK210 PCK210BD MV2002
Text: INTEGRATED CIRCUITS PCK210 Low voltage dual 1:5 differential ECL/PECL clock driver Product data Supersedes data of 2002 Apr 11 Philips Semiconductors 2002 Nov 13 Philips Semiconductors Product data Low voltage dual 1:5 differential ECL/PECL clock driver PCK210
|
Original
|
PCK210
MC100EP210
LQFP32
MC100EP210
PCK210
PCK210BD
MV2002
|
PDF
|
signal path designer
Abstract: No abstract text available
Text: Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order Number: AN1406/D Rev 2, 08/2001 AN1406 Designing With PECL ECL at +5.0 V The High Speed Solution for the CMOS/TTL Designer Prepared by: Cleon Petty, Todd Pearson ECL Applications Engineering
|
Original
|
AN1406/D
AN1406
signal path designer
|
PDF
|
HVQFN32
Abstract: philips capacitor 1000uf 25V LQFP32 MC100EP210 PCK210 PCK210BD PCK210BS
Text: INTEGRATED CIRCUITS PCK210 Low voltage dual 1:5 differential ECL/PECL clock driver Product data Supersedes data of 2002 Dec 13 Philips Semiconductors 2004 Apr 23 Philips Semiconductors Product data Low voltage dual 1:5 differential ECL/PECL clock driver PCK210
|
Original
|
PCK210
MC100EP210
HVQFN32
philips capacitor 1000uf 25V
LQFP32
MC100EP210
PCK210
PCK210BD
PCK210BS
|
PDF
|
HB205/d
Abstract: small signal transistor MOTOROLA DATABOOK cmos logic databook AN1406
Text: Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order Number: AN1406/D Rev 2, 08/2001 Designing With PECL ECL at +5.0 V AN1406 The High Speed Solution for the CMOS/TTL Designer Prepared by: Cleon Petty, Todd Pearson ECL Applications Engineering
|
Original
|
AN1406/D
AN1406
HB205/d
small signal transistor MOTOROLA DATABOOK
cmos logic databook
AN1406
|
PDF
|
AN1406
Abstract: DL140 transistor E111 signal path designer
Text: AN1406 Application Note Designing With PECL ECL at +5.0V Prepared by Cleon Petty Todd Pearson ECL Applications Engineering This application note provides detailed information on designing with Positive Emitter Coupled Logic (PECL) devices. 9/92 Motorola, Inc. 1996
|
Original
|
AN1406
DL140
AN1406/D*
AN1406/D
AN1406
transistor E111
signal path designer
|
PDF
|
HVQFN32
Abstract: philips capacitor 1000uf 25V LQFP32 MC100EP111 PCK111 PCK111BD PCK111BS
Text: INTEGRATED CIRCUITS PCK111 Low voltage 1:10 differential ECL/PECL/HSTL clock driver Product data Supersedes data of 2003 Dec 03 Philips Semiconductors 2004 Apr 23 Philips Semiconductors Product data Low voltage 1:10 differential ECL/PECL/HSTL clock driver
|
Original
|
PCK111
MC100EP111
HVQFN32
philips capacitor 1000uf 25V
LQFP32
MC100EP111
PCK111
PCK111BD
PCK111BS
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Numeric Index Family Specification and General Information Device Data Sheets Package Data This databook contains device specifications for Motorola's ECLinPS advanced ECL logic family. ECLinPS ECL in picoseconds was developed in response to the need for an even higher performance
|
OCR Scan
|
C62460
|
PDF
|
Untitled
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS PCK111 Low voltage 1:10 differential ECL/PECL/HSTL clock driver Product data Supersedes data of 2002 Dec 13 Philips Semiconductors 2003 Dec 03 Philips Semiconductors Product data Low voltage 1:10 differential ECL/PECL/HSTL clock driver
|
Original
|
PCK111
PCK111
MC100EP111
1-to-10
|
PDF
|
4 pin 20 MHz crystal oscillator
Abstract: CCA-552 SEL3531 Crystal oscillator DIL14 SEL3400 Crystal oscillator 12 MHz crystal oscillator 12 mhz 2 pin CCA550 ECL Handbook SEL3430
Text: SARONIX B.V. DATA SHEET 9922 515 750. series Crystal Clock Oscillator Type SEL3400 in DIL-14 ECL Product specification File under SARONIX B.V., SBV2 1998 May 12 SaRonix B.V. Doetinchem, The Netherlands Product specification Crystal Clock Oscillator Type SEL3400 in DIL-14 (ECL)
|
Original
|
SEL3400
DIL-14
DIL-14/4
4 pin 20 MHz crystal oscillator
CCA-552
SEL3531
Crystal oscillator DIL14
Crystal oscillator 12 MHz
crystal oscillator 12 mhz 2 pin
CCA550
ECL Handbook
SEL3430
|
PDF
|
Untitled
Abstract: No abstract text available
Text: A N 1406 Application Note Designing W ith PECL ECL a t +5.0V Prepared by Cleon Petty Todd Pearson ECL Applications Engineering This application note provides detailed information on designing with Positive Emitter Coupled Logic (PECL) devices. 9/92 Motorola, Inc. 1996
|
OCR Scan
|
AN1406
BR1333
|
PDF
|
|
CY7B923
Abstract: CY7B933
Text: Using the CY7B923 as an ECL Clock Source Abstract specifically designed as an ECL clock source, proĆ This application note details the use of an inexpenĆ effective manner. vides the features to address these needs in a highly sive data communications transmitter device as a
|
Original
|
CY7B923
CY7B933
|
PDF
|
signal path designer
Abstract: DL140-D
Text: MOTOROLA Order Number: AN1406/D SEMICONDUCTOR TECHNICAL DATA Rev 2, 08/2001 AN1406 Designing With PECL ECL at +5.0 V The High Speed Solution for the CMOS/TTL Designer Prepared by: Cleon Petty, Todd Pearson ECL Applications Engineering ABSTRACT This application note provides detailed information on
|
Original
|
AN1406/D
AN1406
signal path designer
DL140-D
|
PDF
|
signal path designer
Abstract: No abstract text available
Text: MOTOROLA Order Number: AN1406/D SEMICONDUCTOR TECHNICAL DATA Rev 2, 08/2001 AN1406 Designing With PECL ECL at +5.0 V The High Speed Solution for the CMOS/TTL Designer Prepared by: Cleon Petty, Todd Pearson ECL Applications Engineering ABSTRACT This application note provides detailed information on
|
Original
|
AN1406/D
AN1406
signal path designer
|
PDF
|
foto resistor
Abstract: CY7B923 CY7B933 Cypress Semiconductor, Applications Handbook
Text: Using the CY7B923 as an ECL Clock Source Abstract D0–7 Db–h This application note details the use of an inexpensive data communications transmitter device as a high-precision, flexible, and programmable Emitter-Coupled-Logic (ECL) or Positive-Emitter-Coupled Logic (PECL) clock source. Issues
|
Original
|
CY7B923
foto resistor
CY7B933
Cypress Semiconductor, Applications Handbook
|
PDF
|
AN1406
Abstract: MECL handbook noise specs confusing signal path designer
Text: AN1406/D Designing with PECL ECL at +5.0 V The High Speed Solution for the CMOS/TTL Designer http://onsemi.com Prepared by Cleon Petty Todd Pearson ECL Applications Engineering APPLICATION NOTE This application note provides detailed information on designing with Positive Emitter Coupled Logic (PECL) devices.
|
Original
|
AN1406/D
r14153
AN1406
MECL handbook
noise specs confusing
signal path designer
|
PDF
|
E142 wafer format
Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
Text: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001 SCILLC, 2001 Previous Edition 2000 “All Rights Reserved”
|
Original
|
DL140/D
Jan-2001
r14525
E142 wafer format
HEL32
MR 4710 IC
300w power amplifier circuit diagram
HEL05
klt22
HEL12 HEL31
HEL16
HLT22
HLT28
|
PDF
|
Untitled
Abstract: No abstract text available
Text: POURNS BOURNS EMITTER COUPLED LOGIC TERMINATOR 800 Series For product specifications, see pages 120 and 122. TYPICAL APPLICATION A typical application using a Bourns 801 RC Network in conjunction with a 10K ECL design is shown below. Vee is typically connected to -5.2 volts 10K ECL or -4.5 volts
|
OCR Scan
|
F100K
|
PDF
|
10H125
Abstract: signal path designer MC10125 application
Text: Freescale Semiconductor, Inc. Order number: AN1406 Rev 2, 08/2001 APPLICATION NOTE AN1406 Designing With PECL ECL at +5.0 V The High Speed Solution for the CMOS/TTL Designer By: Cleon Petty, Todd Pearson ECL Applications Engineering ABSTRACT This application note provides detailed information on designing with Positive Emitter Coupled Logic (PECL) devices.
|
Original
|
AN1406
10H125
signal path designer
MC10125 application
|
PDF
|
MS-013
Abstract: PCKEP14 PCKEP14D PCKEP14PW SO20 JEDS78
Text: PCKEP14 2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver Rev. 01 — 30 October 2002 Product data 1. Description The PCKEP14 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input
|
Original
|
PCKEP14
PCKEP14
MS-013
PCKEP14D
PCKEP14PW
SO20
JEDS78
|
PDF
|
foto resistor
Abstract: CY7B923 CY7B933 The signal clock inputs are biased internally and require
Text: fax id: 5106 Using the CY7B923 as an ECL Clock Source Abstract This application note details the use of an inexpensive data communications transmitter device as a high-precision, flexible, and programmable Emitter-Coupled-Logic ECL or Positive-Emitter-Coupled Logic (PECL) clock source. Issues concerning clock characteristics, stability, distribution and design
|
Original
|
CY7B923
foto resistor
CY7B933
The signal clock inputs are biased internally and require
|
PDF
|