DDR3U
Abstract: ddr3 RDIMM pinout
Text: SN74SSQEC32882 SCAS920-PUB – NOVEMBER 2011 www.ti.com 28-Bit to 56-Bit Registered Buffer With Address Parity Test One Pair to Four Pair Differential Clock PLL Driver Check for Samples: SN74SSQEC32882 FEATURES 1 • • • • • • JEDEC SSTE32882 1-to-2 Register Outputs and 1-to-4 Clock Pair
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Original
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PDF
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SN74SSQEC32882
SCAS920-PUB
28-Bit
56-Bit
SSTE32882
DDR3U
ddr3 RDIMM pinout
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Untitled
Abstract: No abstract text available
Text: SN74SSQEC32882 SCAS920-PUB – NOVEMBER 2011 www.ti.com 28-Bit to 56-Bit Registered Buffer With Address Parity Test One Pair to Four Pair Differential Clock PLL Driver Check for Samples: SN74SSQEC32882 FEATURES 1 • • • • • • JEDEC SSTE32882 1-to-2 Register Outputs and 1-to-4 Clock Pair
|
Original
|
PDF
|
SN74SSQEC32882
SCAS920-PUB
28-Bit
56-Bit
SSTE32882
|
ddr3 RDIMM pinout
Abstract: EC32882S DDR3U DDR3-1866 RDIMM SPD JEDEC SSTE32882
Text: SN74SSQEC32882 SCAS920-PUB – NOVEMBER 2011 www.ti.com 28-Bit to 56-Bit Registered Buffer With Address Parity Test One Pair to Four Pair Differential Clock PLL Driver Check for Samples: SN74SSQEC32882 FEATURES 1 • • • • • • JEDEC SSTE32882 1-to-2 Register Outputs and 1-to-4 Clock Pair
|
Original
|
PDF
|
SN74SSQEC32882
SCAS920-PUB
28-Bit
56-Bit
SSTE32882
ddr3 RDIMM pinout
EC32882S
DDR3U
DDR3-1866 RDIMM SPD JEDEC
|
Untitled
Abstract: No abstract text available
Text: SN74SSQEC32882 SCAS920-PUB – NOVEMBER 2011 www.ti.com 28-Bit to 56-Bit Registered Buffer With Address Parity Test One Pair to Four Pair Differential Clock PLL Driver Check for Samples: SN74SSQEC32882 FEATURES 1 • • • • • • JEDEC SSTE32882 1-to-2 Register Outputs and 1-to-4 Clock Pair
|
Original
|
PDF
|
SN74SSQEC32882
SCAS920-PUB
28-Bit
56-Bit
SSTE32882
|