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Catalog Datasheet	MFG & Type	Document Tags	PDF
marking UY Abstract: No abstract text available Text: 74LVC1G125 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments Top View The 74LVC1G125 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance OE 1 5 state when a HIGH-level is applied to the output enable (OE)	Original	74LVC1G125 74LVC1G125 OT353 DS32202 marking UY	PDF
74LVC1G125W5 Abstract: JESD-78 1.8V Text: 74LVC1G125 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments Top View The 74LVC1G125 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance OE 1 state when a HIGH-level is applied to the output enable (OE)	Original	74LVC1G125 74LVC1G125 OT353 DS32202 74LVC1G125W5 JESD-78 1.8V	PDF
74LVC1G125 Abstract: A115-A DFN1410 Text: 74LVC1G125 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments Top View The 74LVC1G125 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance OE 1 A 2 5 Vcc 4 Y state when a HIGH-level is applied to the output enable (OE)	Original	74LVC1G125 74LVC1G125 OT353 DS32202 A115-A DFN1410	PDF
Untitled Abstract: No abstract text available Text: 74LVC1G125 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments The 74LVC1G125 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance state when a HIGH-level is applied to the output enable OE pin. The device is	Original	74LVC1G125 74LVC1G125 DS32202	PDF
Untitled Abstract: No abstract text available Text: 74LVC1G125 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments Top View ( Top View ) The 74LVC1G125 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance state when a HIGH-level is applied to the output enable (OE)	Original	74LVC1G125 74LVC1G125 OT553 OT353 DS32202	PDF
JESD-78 1.8V Abstract: 74LVC1G125W5 VM MARKING CODE SOT353 Text: 74LVC1G125 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments Top View ( Top View ) The 74LVC1G125 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance state when a HIGH-level is applied to the output enable (OE)	Original	74LVC1G125 74LVC1G125 OT353 OT553 DS32202 JESD-78 1.8V 74LVC1G125W5 VM MARKING CODE SOT353	PDF
74LVC1G125SE Abstract: marking code uy 74LVC1G125 A115-A 74LVC1G125SE-7 74LVC1G125W5 Text: 74LVC1G125 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments Top View The 74LVC1G125 is a single non-inverting buffer/bus driver with a 3-state output. The output enters a high impedance state when a HIGH-level is applied to the output enable (OE)	Original	74LVC1G125 74LVC1G125 OT353 DS32202 74LVC1G125SE marking code uy A115-A 74LVC1G125SE-7 74LVC1G125W5	PDF
Untitled Abstract: No abstract text available Text: 74LVC1G125 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments The 74LVC1G125 is a single non-inverting buffer/bus driver with a 3- Top View ( Top View ) state output. The output enters a high impedance state when a HIGH- A 2 for operation with a power supply range of 1.65V to 5.5V. The inputs	Original	74LVC1G125 74LVC1G125 OT553 OT353 DS32202	PDF