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    DS90CR281

    Abstract: DS90CR281MTD DS90CR282 DS90CR282MTD MTD56 AN-1035
    Text: General Description The DS90CR281 transmitter converts 28 bits of CMOS/TTL data into four LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle


    Original     		PDF DS90CR281 DS90CR282 ds012638 DS90CR281MTD DS90CR282MTD MTD56 AN-1035

    Untitled

    Abstract: No abstract text available
    Text: DS90CR281,DS90CR282 DS90CR281/DS90CR282 28-Bit Channel Link Literature Number: SNLS113A DS90CR281/DS90CR282 28-Bit Channel Link General Description The DS90CR281 transmitter converts 28 bits of CMOS/TTL data into four LVDS Low Voltage Differential Signaling data


    Original     		PDF DS90CR281 DS90CR282 DS90CR281/DS90CR282 28-Bit SNLS113A

    DS90CR281MTDX

    Abstract: No abstract text available
    Text: DS90CR281/DS90CR282 28-Bit Channel Link General Description The DS90CR281 transmitter converts 28 bits of CMOS/TTL data into four LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle


    Original     		PDF DS90CR281/DS90CR282 28-Bit DS90CR281 DS90CR282 DS90CR282MTD DS90CR282MTDX DS90CR281MTDX

    DS90CR281

    Abstract: DS90CR281MTD DS90CR282 DS90CR282MTD MTD56
    Text: DS90CR281/DS90CR282 28-Bit Channel Link General Description The DS90CR281 transmitter converts 28 bits of CMOS/TTL data into four LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle


    Original     		PDF DS90CR281/DS90CR282 28-Bit DS90CR281 DS90CR282 Long959 DS90CR281MTD DS90CR282MTD MTD56

    DS90CR281

    Abstract: DS90CR281MTD DS90CR282 DS90CR282MTD MTD56
    Text: DS90CR281/DS90CR282 28-Bit Channel Link General Description The DS90CR281 transmitter converts 28 bits of CMOS/TTL data into four LVDS Low Voltage Differential Signaling data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle


    Original     		PDF DS90CR281/DS90CR282 28-Bit DS90CR281 DS90CR282 DS90CR281MTD DS90CR282MTD MTD56