Untitled
Abstract: No abstract text available
Text: User's Guide SNVA497B – July 2011 – Revised May 2013 AN-2175 LM21305 POL Demonstration Module and Reference Design 1 Introduction This LM21305 synchronous buck switching regulator board-mounted module is a complete, easy-to-use DC-DC point-of-load POL solution capable of driving up to 5A of load current with excellent conversion
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SNVA497B
AN-2175
LM21305
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cdv304
Abstract: capacitive coupling ethernet CDC111 CDCV304 CDCVF111 HPA8133A TLK3104SA
Text: Application Report SCAA049 – November 2001 Using TI’s CDC111/CDCVF111 With TLK3104SA Serial Transceiver for Gigabit Ethernet and Backplane Applications Kal Mustafa High Performance Analog/CDC ABSTRACT This application report discusses jitter transfer of TI’s CDC111/CDCVF111 clock drivers
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SCAA049
CDC111/CDCVF111
TLK3104SA
TLK3104
TLK3104SA.
cdv304
capacitive coupling ethernet
CDC111
CDCV304
CDCVF111
HPA8133A
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CDCVF2301
Abstract: HP8133A TLK1501 CDCVF2310 CDCVF25081 rohde schwarz SCAA064 07A1CGT TLK1501 rohde
Text: Application Report SCAA064 – May 2003 Using TI’s CDCVF2310 and CDCVF25081 with TLK1501 Serial Transceiver Kal Mustafa/Roger Chan High Performance Analog ABSTRACT This test report discusses jitter transfer of TI’s CDCVF2310 and CDCVF25081 clock drivers when driving TI’s TLK1501 serial gigabit transceiver at 600 Mbit/sec. This
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SCAA064
CDCVF2310
CDCVF25081
TLK1501
TLK1501
TLK1501.
CDCVF2301
HP8133A
rohde schwarz
SCAA064
07A1CGT TLK1501
rohde
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QS34X245Q3
Abstract: QS74FCT534 driving point and transfer AN-41
Text: AN-41 Q Using Quality Semiconductor’s QuickSwitch Technology on the PCI Local Bus QUALITY SEMICONDUCTOR, INC. Application Note AN-41 Abstract The Peripheral Component Interconnect PCI Local Bus is designed to increase the data transfer rate between a processor and its peripheral components,
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AN-41
MAPN-00041-00
QS34X245Q3
QS74FCT534
driving point and transfer
AN-41
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ARM7tdmi coprocessor
Abstract: Co-Processors ARM7TDMI instruction set coprocessor
Text: 1 7 11 Coprocessor Interface 7.1 Overview 7-2 7.2 Interface Signals 7-2 7.3 Register Transfer Cycle 7-3 7.4 Privileged Instructions 7-3 7.5 Idempotency 7-4 7.6 Undefined Instructions 7-4 ARM7TDMI Data Sheet Lit. No.0673A 06/96 Open Access The functionality of the ARM7TDMI instruction set can be extended by adding external
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AN1056
Abstract: No abstract text available
Text: Terminating RoboClock II TM Outputs AN1056 Why RoboClock II Outputs Need to be Terminated transferring more crosstalk to neighboring traces. The ringing can also reduce noise margin and induce false clocking. Transmission line effects are present on all electrical interconnections. However, these effects only really become a
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AN1056
AN1056
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Untitled
Abstract: No abstract text available
Text: Digital Temperature Controllers E5@Z 1/16, 1/8, and 1/4 DIN Temperature Controllers Join the Best-selling E5@Z Series • Models available with either temperature inputs or analog inputs. • A wide range of functions, such as a loop break alarm LBA , manual output, and transfer output.
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11-segment
NL-2132
H209-E1-03
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M65KG256AF
Abstract: No abstract text available
Text: M65KG256AF 256Mbit 4 Banks x 4M x 16 1.8 V Supply, 133MHz, DDR Low Power SDRAM Preliminary Data Feature summary • 256Mbit Synchronous Dynamic RAM – Organized as 4 Banks of 4MWords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/clock cycle
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M65KG256AF
256Mbit
133MHz,
256Mbit
266Mbit/s
133MHz
M65KG256AF
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M65KG256AB
Abstract: A476
Text: M65KG256AB 256Mbit 4 Banks x 4M x 16 1.8V Supply, 133MHz Clock Rate, DDR Low Power SDRAM PRELIMINARY DATA Features summary • 256Mbit SYNCHRONOUS DYNAMIC RAM – Organized as 4 Banks of 4MWords, each 16 bits wide ■ DOUBLE DATA RATE (DDR) – 2 Data Transfers/Clock Cycle
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M65KG256AB
256Mbit
133MHz
256Mbit
266Mbit/s
133MHz
M65KG256AB
A476
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Untitled
Abstract: No abstract text available
Text: M65KG256AF 256Mbit 4 Banks x 4M x 16 1.8 V Supply, 133MHz, DDR Low Power SDRAM Preliminary Data Feature summary • 256Mbit Synchronous Dynamic RAM – Organized as 4 Banks of 4MWords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/clock cycle
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M65KG256AF
256Mbit
133MHz,
256Mbit
266Mbit/s
133MHz
M65KG256AF8W6T
M65KG256AF
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Untitled
Abstract: No abstract text available
Text: M65KG512AA 512Mbit 4 Banks x 8M x 16 1.8V supply, DDR low power SDRAM Features • 512Mbit Synchronous Dynamic Ram – Organized as 4 Banks of 8 Mwords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 266 Mbit/s (max)
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M65KG512AA
512Mbit
512Mbit
M65KG512AA8W9
M65KG512AA
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M65KG512AB
Abstract: No abstract text available
Text: M65KG512AB 512Mbit 4 Banks x 8M x 16 1.8V supply, DDR Low Power SDRAM Features summary • 512Mbit Synchronous Dynamic Ram – Organized as 4 Banks of 8MWords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 266Mbit/s (max)
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M65KG512AB
512Mbit
512Mbit
266Mbit/s
133MHz
M65KG512AB
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Untitled
Abstract: No abstract text available
Text: M65KG512AA 512Mbit 4 Banks x 8M x 16 1.8V supply, DDR low power SDRAM Features • 512Mbit Synchronous Dynamic Ram – Organized as 4 Banks of 8 Mwords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 266 Mbit/s (max)
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M65KG512AA
512Mbit
512Mbit
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Untitled
Abstract: No abstract text available
Text: M65KG512AB 512Mbit 4 Banks x 8M x 16 1.8V supply, DDR Low Power SDRAM Features • 512Mbit Synchronous Dynamic RAM – Organized as 4 Banks of 8MWords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 332Mbit/s max. for 6ns speed
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M65KG512AB
512Mbit
512Mbit
332Mbit/s
133MHz
166MHz
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temperature controller circuit diagram with relay
Abstract: manual omron E5CN-Q2MT-500 E5CN-Q2MT-500 E5CN-R2MT-500 omron ct E54-CT1 diagram 3 phase heater E5CN-R2T 4 to 20ma current source circuit diagram E5CN-R2T manual omron e5cn
Text: Digital Temperature Controllers E5@N 1/16, 1/8, and 1/4 DIN Temperature Controllers Join the Best-selling E5@N Series • Models available with either temperature inputs or analog inputs. • A wide range of functions, such as three-phase heater burnout detection, two control outputs, manual outputs, and transfer outputs.
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11-segment
AWG14
H136-E2-01-X
NL-2132
temperature controller circuit diagram with relay
manual omron E5CN-Q2MT-500
E5CN-Q2MT-500
E5CN-R2MT-500
omron ct E54-CT1
diagram 3 phase heater
E5CN-R2T
4 to 20ma current source circuit diagram
E5CN-R2T manual
omron e5cn
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M65KG512AB
Abstract: No abstract text available
Text: M65KG512AB 512Mbit 4 banks x 8 Mb x 16 1.8 V supply, DDR low power SDRAM Features • 512Mbit Synchronous Dynamic RAM – Organized as 4 banks of 8 Mwords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 332 Mbit/s max. for 6ns speed
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M65KG512AB
512Mbit
512Mbit
M65KG512AB
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manual omron E5CN-Q2MT-500
Abstract: E5CN-R2T manual E5EN-Q3HMT-500 E5CN-R2T E5AN-R3HMT-500 E5EN-R3HMT-500 E5EN-R3MT-500 PT100 IEC 751 E5AN-R3MT-500 E5EN-C3MT-500
Text: Digital Temperature Controllers E5@N 1/16, 1/8, and 1/4 DIN Temperature Controllers Join the Best-selling E5@N Series • Models available with either temperature inputs or analog inputs. • A wide range of functions, such as three-phase heater burnout detection, two control outputs, manual outputs, and transfer outputs.
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11-segment
H136-E1-01
75-344-7080/Fax:
0205-2M
manual omron E5CN-Q2MT-500
E5CN-R2T manual
E5EN-Q3HMT-500
E5CN-R2T
E5AN-R3HMT-500
E5EN-R3HMT-500
E5EN-R3MT-500
PT100 IEC 751
E5AN-R3MT-500
E5EN-C3MT-500
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DM 024
Abstract: DDR400 PC3200 DDR266 DDR333 512mb sodimm pc2700 200 pin samsung
Text: White Electronic Designs W3EG264M72EFSUxxxD4 ADVANCED* 1GB – 2x64Mx72 DDR SDRAM, UNBUFFERED, FBGA FEATURES DESCRIPTION Fast data transfer rate: PC-2100, PC-2700 and PC3200 The W3EG264M72EFSU is a 2x64Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR
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W3EG264M72EFSUxxxD4
2x64Mx72
PC-2100,
PC-2700
PC3200
W3EG264M72EFSU
512Mb
64Mx8
200MHz
DM 024
DDR400
PC3200
DDR266
DDR333
512mb sodimm pc2700 200 pin samsung
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DDR266
Abstract: DDR333 DDR400 PC3200
Text: White Electronic Designs W3EG264M72EFSUxxxD4 ADVANCED* 1GB – 2x64Mx72 DDR SDRAM, UNBUFFERED, FBGA FEATURES DESCRIPTION Fast data transfer rate: PC-2100, PC-2700 and PC3200 Clock speeds of 133 MHz, 166 MHz and 200MHz Supports ECC error detection and correction
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W3EG264M72EFSUxxxD4
2x64Mx72
PC-2100,
PC-2700
PC3200
W3EG264M72EFSU
512Mb
64Mx8
200MHz
DDR266
DDR333
DDR400
PC3200
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DDR266
Abstract: DDR333 DDR400 PC3200
Text: White Electronic Designs W3EG264M72EFSUxxxD4 ADVANCED* 1GB - 2x64Mx72 DDR SDRAM, UNBUFFERED, FBGA FEATURES DESCRIPTION Fast data transfer rate: PC-2100, PC-2700 and PC3200 The W3EG264M72EFSU is a 2x64Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR
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W3EG264M72EFSUxxxD4
2x64Mx72
PC-2100,
PC-2700
PC3200
W3EG264M72EFSU
512Mb
64Mx8
200MHz
DDR266
DDR333
DDR400
PC3200
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MCX314
Abstract: am26l31 AM26L32 125x4 1pps ax31 10000pps 10KPPS CLK16MHZ PB3P
Text: Motion Control IC MCX314 User’s Manual Ver 2.0 WObit 61-548 Poznan, ul.Wierzbiecice 66/7 MCX314 Contents 1. OUTLINE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
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MCX314
625MPPS/
125KPPS/SEC
1000PPS
40000PPS
125KPPS/
100PPS
MCX314
am26l31
AM26L32
125x4
1pps
ax31
10000pps
10KPPS
CLK16MHZ
PB3P
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selic
Abstract: M52767FP SG10 V17L MITSUBISHI NFB
Text: To all our customers Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
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HD61102
Abstract: vqc 10 display HD61103A
Text: HD61102- — Dot M atrix Liquid Crystal G raphic D isplay Colum n Driver Description Features HD61102 is a column (segment) driver for dot matrix liquid crystal graphic display systems. It stores the display data transferred from a 8-bit
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HD61102-------------------
HD61102
HD61102,
HD6800
HD6801,
HD61102
HD61103As
COM65
COM66
COM64
vqc 10 display
HD61103A
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Untitled
Abstract: No abstract text available
Text: H D 6 1 1 0 2 - D o t M atrix Liquid Crystal Graphic Display Colum n D river Description Features HD61102 is a column (segment) driver for dot matrix liquid crystal graphic display systems. It stores the display data transferred from a 8-bit
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HD61102
HD61102,
HD6800
HD6801,
HD61102
HD61103As
COM65
COM66
COM64
COM128
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