Contextual Info: i|g; m I | • ''• d m r 1 M L HIGH-SPEED 3.3V 16K x 36 | SYNCHRONOUS PIPELINED DUAL-PORT STATIC ra m PRELIMINARY IDT70V3569S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed clock to data access

Contextual Info: 1»ill 1IFV1F 1 1 U 1 ‘! S y P r • W 0 L HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3569S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed clock to data access

Contextual Info: 1» i l l 1 I F V 1 F III 11 Jl 1 ‘! S y P r • L HIGH-SPEED 3.3V 32K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3579S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access of the same memory location

A12L

Abstract: A14L IDT70V3579 IDT70V3579S
Contextual Info: HIGH-SPEED 3.3V 32K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 5/6ns max. Pipelined output mode

70V3569

Abstract: A12L A13L IDT70V3569 IDT70V3569S
Contextual Info: HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE PRELIMINARY IDT70V3569S Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed clock to data access

Contextual Info: Glass passivated rectifier diodes. 1 Amp. to 3 Amps. The plastic material carries U/L recognition 94V-0. Maximum Average Max.Recurrent Repetitive Peak Forward Forward Rectified Reverse T Y PE Current Current Voltage If av Ta V rrm I fr m (A) Axial Lead | S.M.D.

tdc 310

Abstract: ba6l BA6R 10 35L U1
Contextual Info: HIGH-SPEED 3.3V 256K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ 256K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture – 64 independent 4K x 36 banks – 9 megabits of memory on chip

ba6l

Contextual Info: HIGH-SPEED 3.3V 64K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ 64K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture – 64 independent 1K x 36 banks – 2 megabits of memory on chip

DR201

Abstract: DR200 DR202 DR204 DR206 DR208 DR210
Contextual Info: DR200 - DR210 SILICON RECTIFIER DIODES PRV : 50 - 1000 Volts Io : 2.0 Amperes D2 FEATURES : * * * * * * High current capability High surge current capability High reliability Low reverse current Low forward voltage drop Pb / RoHS Free 1.00 25.4 MIN. 0.161 (4.10)

IDT70T659

Contextual Info: HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE Features ◆ ◆ ◆ ◆ ◆ ◆ Busy and Interrupt Flags On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port

10 35L U4

Abstract: 70V7589 IDT70V7589 IDT70V7589S BA5L
Contextual Info: HIGH-SPEED 3.3V 64K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE PRELIMINARY IDT70V7589S Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ 64K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture – 64 independent 1K x 36 banks

IDT70T659

Abstract: 9S12 CAN 9S12
Contextual Info: Š Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT70T651/9S HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE ◆ On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port

OE33

Abstract: bel 188 transistor IDT72V73263
Contextual Info: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH WITH RATE MATCHING 16,384 X 16,384 CHANNELS FEATURES: • • • • • • • • • • • • • • • • Up to 64 serial input and output streams Maximum 16,384 x 16,384 channel non-blocking switching

70V7519

Abstract: IDT70V7519 IDT70V7519S ba6l
Contextual Info: Š HIGH-SPEED 3.3V 256K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ 256K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture – 64 independent 4K x 36 banks – 9 megabits of memory on chip

IDT70T3589

Abstract: IDT70T3599 70T359 70T3589
Contextual Info: HIGH-SPEED 2.5V 256/128/64K x 36 IDT70T3519/99/89S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

70T3589

Contextual Info: HIGH-SPEED 2.5V 256/128/64K x 36 IDT70T3519/99/89S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

OF590

Contextual Info: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 16,384 X 16,384 ADVANCE INFORMATION IDT72V71660 CONFIDENTIAL FEATURES: DESCRIPTION: • • The IDT72V71660 has a non-blocking switch capacity of 2,048 x 2,048 channels at 2.048 Mb/s, 4,096 x 4,096 channels at 4.096 Mb/s, and 8,192 x

Contextual Info: Š Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT70T651/9S HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE ◆ On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port

64Kx8 dual-port CMOS RAM

Abstract: 64Kx8 CMOS RAM BF208 fast sram 100mhz BC256 70V3379 70V9079 70V9089 70V9099 70V9189
Contextual Info: THE MOST COMMONLY ASKED QUESTIONS ABOUT SYNCHRONOUS DUAL-PORT SRAMS APPLICATION NOTE AN-254 By Cheryl Brennan What is a dual-port? A dual-port SRAM is a single static RAM array with two sets of address, data, and control signals typically left and right for accessing that array.

B12 IC marking code

Abstract: 70V3599 A12L IDT70V3599 IDT70V3599S
Contextual Info: HIGH-SPEED 3.3V 128K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE PRELIMINARY IDT70V3599S Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

DR206G

Abstract: DR210G DO-204AC DR200G DR201G DR202G DR204G dr202
Contextual Info: DR200G thru DR210G Glass Passivated Junction Rectifiers Reverse Voltage 50 to 1000 Volts Forward Current 2.0 Amperes Features ‹ Glass passivated chip ‹ High current capability ‹ High reliability ‹ Low reverse current ‹ Low forward voltage drop Mechanical Data

OF590

Abstract: of570 OF622 OF422 sfe 6,5 mb TX57 DLE40 OF402 OF450 OF502
Contextual Info: PRELIMINARY IDT72V71660 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 16,384 X 16,384 FEATURES: DESCRIPTION: • • The IDT72V71660 has a non-blocking switch capacity of 2,048 x 2,048 channels at 2.048Mb/s, 4,096 x 4,096 channels at 4.096Mb/s, and 8,192 x

IDT70T659

Contextual Info: HIGH-SPEED 2.5V 256/128K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V 0R 2.5V INTERFACE Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed access – Commercial: 10/12/15ns max.

JESD22-a100

Abstract: JESD22-A102 IDT82V2044E IDT82V2084 DR208 IDT82V2048E IDT82V2088 JESD22-A108 JESD22A100 STD-78
Contextual Info: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: T0512-01 DATE: 12/23/05 Product Affected: IDT82V2088, IDT82V2084, IDT82V2048E IDT82V2044E on All Package Options Date Effective: