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    IDEC Corporation AVLD39920DN-R-6V

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    IDEC Corporation ALD39902DN-G-12V

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    IDEC Corporation ALD39910DN-S-24V

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    IDEC Corporation ASLD39904DN-W-6V

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    RS ASLD39904DN-W-6V Bulk 1
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    IDEC Corporation AYLD39902DN-G-24V

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    RS AYLD39902DN-G-24V Bulk 1
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    D399 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    SN74ACT1071

    Abstract: SN74ACT1071D SN74ACT1071DE4 SN74ACT1071DG4 SN74ACT1071DR SN74ACT1071DRE4
    Text: SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 D3994, MARCH 1992 – REVISED APRIL 1993 • • • • • • • D PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1071 10-BIT SCAS192 D3994, MIL-STD-883C, SN74ACT1071 SN74ACT1071D SN74ACT1071DE4 SN74ACT1071DG4 SN74ACT1071DR SN74ACT1071DRE4 PDF

    SN74ACT1071

    Abstract: d3994
    Text: SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 D3994, MARCH 1992 – REVISED APRIL 1993 • • • • • • • D PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1071 10-BIT SCAS192 D3994, MIL-STD-883C, SN74ACT1071 d3994 PDF

    SN74ACT1071

    Abstract: No abstract text available
    Text: SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 D3994, MARCH 1992 – REVISED APRIL 1993 • • • • • • • D PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1071 10-BIT SCAS192 D3994, MIL-STD-883C, SN74ACT1071 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 D3994, MARCH 1992 – REVISED APRIL 1993 • • • • • • • D PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1071 10-BIT SCAS192 D3994, MIL-STD-883C, PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 D3994, MARCH 1992 – REVISED APRIL 1993 • • • • • • • D PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1071 10-BIT SCAS192 D3994, MIL-STD-883C, PDF

    74ACT11086

    Abstract: HC86
    Text: 74ACT11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS091 D3990, NOVEMBER 1989 – REVISED APRIL 1993 • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original
    74ACT11086 SCAS091 D3990, 500-mA 300-mil 74ACT11086 HC86 PDF

    SR57 battery

    Abstract: D399 D-399 SR57 1125H
    Text: SIZE D399 Silver Oxide Battery SR57 SPECIFICATIONS Minimum No Load Voltage: 1.55 V Minimum On Load Voltage: .84V on 22Ohms at 1000 Minimum Life 1125 H 34.8k Ohms Hr/Day 1.2 V Rated Capacity 50 mAh on 34.8kOhms to 1.2V Volume .18 cm3 Weight .78g Physical Size in mm


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    22Ohms SR57 battery D399 D-399 SR57 1125H PDF

    SN74ACT1073

    Abstract: SCAS193
    Text: SN74ACT1073 16-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS193 D3992, MARCH 1992 – REVISED APRIL 1993 • • • • • • • DW PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1073 16-BIT SCAS193 D3992, MIL-STD-883C, 14ocal SN74ACT1073 SCAS193 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 D3994, MARCH 1992 – REVISED APRIL 1993 • • • • • • • D PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1071 10-BIT SCAS192 D3994, MIL-STD-883C, PDF

    SN74ACT1071

    Abstract: SN74ACT1071D SN74ACT1071DE4 SN74ACT1071DR SN74ACT1071DRE4
    Text: SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 D3994, MARCH 1992 – REVISED APRIL 1993 • • • • • • • D PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1071 10-BIT SCAS192 D3994, MIL-STD-883C, SN74ACT1071 SN74ACT1071D SN74ACT1071DE4 SN74ACT1071DR SN74ACT1071DRE4 PDF

    74ACT11086

    Abstract: No abstract text available
    Text: 74ACT11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS091 D3990, NOVEMBER 1989 – REVISED APRIL 1993 • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original
    74ACT11086 SCAS091 D3990, 500-mA 300-mil PDF

    74ACT11086

    Abstract: 74ACT11086D 74ACT11086N HC86
    Text: 74ACT11086 QUADRUPLE 2ĆINPUT EXCLUSIVEĆOR GATE ą ą SCAS091 D3990, NOVEMBER 1989 − REVISED APRIL 1993 • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original
    74ACT11086 SCAS091 D3990, 500-mA 300-mil 74ACT11086 74ACT11086D 74ACT11086N HC86 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 D3994, MARCH 1992 – REVISED APRIL 1993 • • • • • • • D PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1071 10-BIT SCAS192 D3994, MIL-STD-883C, PDF

    SCAS193

    Abstract: SN74ACT1073
    Text: SN74ACT1073 16-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS193 D3992, MARCH 1992 – REVISED APRIL 1993 • • • • • • • DW PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1073 16-BIT SCAS193 D3992, MIL-STD-883C, 14customer SCAS193 SN74ACT1073 PDF

    74ACT11086

    Abstract: No abstract text available
    Text: 74ACT11086 QUADRUPLE 2ĆINPUT EXCLUSIVEĆOR GATE ą ą SCAS091 D3990, NOVEMBER 1989 − REVISED APRIL 1993 • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original
    74ACT11086 SCAS091 D3990, 500-mA 300-mil PDF

    SN74ACT1071

    Abstract: SN74ACT1071D SN74ACT1071DE4 SN74ACT1071DG4 SN74ACT1071DR SN74ACT1071DRE4
    Text: SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 D3994, MARCH 1992 – REVISED APRIL 1993 • • • • • • • D PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1071 10-BIT SCAS192 D3994, MIL-STD-883C, 11-Mar-2008 SN74ACT1071DR SN74ACT1071 SN74ACT1071D SN74ACT1071DE4 SN74ACT1071DG4 SN74ACT1071DR SN74ACT1071DRE4 PDF

    74ACT11086

    Abstract: No abstract text available
    Text: 74ACT11086 QUADRUPLE 2ĆINPUT EXCLUSIVEĆOR GATE ą ą SCAS091 D3990, NOVEMBER 1989 − REVISED APRIL 1993 • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original
    74ACT11086 SCAS091 D3990, 500-mA 300-mil PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS192 D3994, MARCH 1992 – REVISED APRIL 1993 • • • • • • • D PACKAGE TOP VIEW Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot


    Original
    SN74ACT1071 10-BIT SCAS192 D3994, MIL-STD-883C, 4-Oct-2007 SN74ACT1071DR PDF

    control up/down 0-255

    Abstract: 74ACT11867
    Text: 74ACT11867 SYNCHRONOUS 8-BIT UP/DOWN BINARY COUNTER WITH ASYNCHRONOUS CLEAR SCAS178 D3990, DECEMBER 1991 – REVISED APRIL 1993 • • • • • • • Inputs Are TTL-Voltage Compatible Asynchronous Clear Fully Independent Clock Circuit Simplifies


    Original
    74ACT11867 SCAS178 D3990, 500-mA control up/down 0-255 74ACT11867 PDF

    74ACT11086

    Abstract: No abstract text available
    Text: 74ACT11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS091 D3990, NOVEMBER 1989 – REVISED APRIL 1993 • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original
    74ACT11086 SCAS091 D3990, 500-mA 300-mil PDF

    74ACT11086

    Abstract: No abstract text available
    Text: 74ACT11086 QUADRUPLE 2ĆINPUT EXCLUSIVEĆOR GATE ą ą SCAS091 D3990, NOVEMBER 1989 − REVISED APRIL 1993 • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original
    74ACT11086 SCAS091 D3990, 500-mA 300-mil 74ACT11086 PDF

    74ACT11867

    Abstract: BOX655303
    Text: 74ACT11867 SYNCHRONOUS 8-BIT UP/DOWN BINARY COUNTER WITH ASYNCHRONOUS CLEAR SCAS178 - D3990, DECEMBER 1991 - REVISED APRIL 1993 DW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Asynchronous Clear Fully Independent Clock Circuit Simplifies Use Flow-Through Architecture Optimizes


    OCR Scan
    74ACT11867 SCAS178 D3990, 500-mA 74ACT11867 D10371D BOX655303 PDF

    D3996

    Abstract: No abstract text available
    Text: TLC5502-5M 8-BIT ANALOG-TO-DIGITAL CONVERTER D3996, MA RCH 1992 J PACKAGE LinEPIC 1- xm CMOS Process (TOP VIEW 8-Bit Resolution Differential Linearity E rro r. . . ±0.2% Max Maximum Conversion R a te . . . 20 MHz Typ . . . 1 0 MHz Min D G TL G N D 1 [ 1 U


    OCR Scan
    TLC5502-5M D3996, D3996 PDF

    D3995

    Abstract: No abstract text available
    Text: TLE2144M, TLE2144AM EXCALIBUR LOW-NOISE HIGH-SPEED PRECISION QUAD OPERATIONAL AMPLIFIERS D3995, N O V E M B E R 1991 a v a ila b le fe a tu re s Low Noise: 10 Hz 1 kHz Low V|Q . . . 1.5 m V M ax at 25°C 15 nV/Vfiz 10.5 nV/VHz S in gle or Split S u p p ly . . .


    OCR Scan
    TLE2144M, TLE2144AM D3995, D3995 PDF