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    D2S57

    Abstract: 54AC11008
    Text: 54AC11008, 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATES TI0046— D2S57, AUGUST 1987— REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11008 . . . J PACKAGE 74AC11008 . . . D OR N PACKAGE TOP VIEW Center-Pin V cc and GND Configurations to


    OCR Scan     		PDF 54AC11008, 74AC11008 TI0046-- D2S57, 500-mA 300-mll D2957, TI0046 D2S57 54AC11008

    74AC11157

    Abstract: D2957 54AC11157
    Text: 54AC11157, 74AC11157 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS TI0107— D2957, JU LY 1989— REVISED MARCH 1990 • Buffered Inputs and Outputs S4AC11157 . . . J PACKAGE 74AC11157 . . . DW OR N PACKAGE Flow-Through Architecture to Optimize PCB


    OCR Scan     		PDF 54AC11157, 74AC11157 TI0107â 500-mA 300-mil 54AC11157 74AC11157 D2957 54AC11157