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    Untitled

    Abstract: No abstract text available
    Text: Data Sheet May 1998 m icroelectronics group Lucent Technologies Bell Labs Innovations T7689 5.0 VT1 Quad Line Interface Features Description • Four fully integrated T1 line interfaces The T7689 is a fully integrated quad line interface containing four transmit and receive channels for use


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    PDF T7689 T7290A T-7689 100-Pin DS98-232TIC DS96-185T1C

    GSM jamming scheme generator

    Abstract: "IEEE 802.3" "Clause 27" BRXD12 BTXD02 APAA LUC3R04 S5241 OXCO LUC3S02 BTXD10
    Text: Preliminary Data Sheet July 1997 microelectronics group Lucent Technologies Bell Labs Innovations LUC3R04 10/100 Mbits/s Managed Repeater CMOS Integrated Circuit Features • Four single repeaters per chip allow for port mobil­ ity repeater designs similar to those based on the


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    PDF LUC3R04 ATT1RX04. 100Base-TX, LUC3S02 005002b 208-Pin LUC3R04-FC GSM jamming scheme generator "IEEE 802.3" "Clause 27" BRXD12 BTXD02 APAA LUC3R04 S5241 OXCO BTXD10

    1C07

    Abstract: plj1 ATT ORCA fpga architecture ATT ORCA fpga HC s304 1C09 ic all pics IC PIN CONFIGURATION OF 74 47 1C03 1C05
    Text: AT&T Data Sheet March 1995 ' Microelectronics Optimized Reconfigurable Cell Array {ORCA 1C Series Field-Programmable Gate Arrays ATT1C03, ATT1C05, ATT1C07, and ATT1C09) Features • High density: to 11,400 usable gates ■ High I/O: up to 256 usable I/O (forATT1C09)


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    PDF ATT1C03, ATT1C05, ATT1C07, ATT1C09) forATT1C09) 16-bit 84-Pin 100-Pin 132-Pin 144-Pin 1C07 plj1 ATT ORCA fpga architecture ATT ORCA fpga HC s304 1C09 ic all pics IC PIN CONFIGURATION OF 74 47 1C03 1C05

    HIGHWAY 08 20 PIN IC PIN DIAGRAM

    Abstract: No abstract text available
    Text: Preliminary Data Sheet August 1998 microelectronics group Lucent Technologies Bell Labs Innovations ^ TTSI1K16T 1024-Channel, 16-Highway Time-Slot Interchanger Features Applications • Sixteen full-duplex, serial time-division multiplexed TDM highways.


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    PDF TTSI1K16T 1024-Channel, 16-Highway 1024-channel DS98-290TIC 005005b 0037T31 107obt> HIGHWAY 08 20 PIN IC PIN DIAGRAM

    Untitled

    Abstract: No abstract text available
    Text: Data Sheet September 1992 m ic ro e le c tro n ic s group Lucent Technologies Bell Labs Innovations Features • Functionally conforms to IEEE 802.3, Section 9, specification* ■ Supports modular parallel port expansion via multiple SHC devices ■ Powers up in basic hub configuration


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    PDF 132-pin T7241 15-port G05Q02b

    DSP1611

    Abstract: DSP1617 DSP1618 GQS002L T76B 6hip DSP1616 DSP16a
    Text: Data Sheet May 1995 • ■ = M l «M Microelectronics DSP1611 Digital Signal Processor 1 Features ■ IEEE P1149.1 test port JTAG with boundary scan ■ ■ Full-speed in-circuit emulation hardware on-chip ■ Supported by DSP1611 software and hardware


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    PDF DSP1611 100-Pin V1111111111Ã 005002b DSP1617 DSP1618 GQS002L T76B 6hip DSP1616 DSP16a

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Data Sheet February 1997 microelectronics group Lucent Technologies Bell Labs Innovations DSP1629 Digital Signal Processor 1 Features 2 Description • Optimized for digital cellular applications with a bit manipulation unit for higher coding efficiency.


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    PDF DSP1629 DSP1629x16 DSP1629x10 144-Pin DE4E40

    PTI8

    Abstract: PT15D R2C14 R12C6 R11C9
    Text: microelectronics group Lucent Technologies Bell Labs Innovations ORCA OR2CxxA 5.0 V and OR2TxxA (3.3 V) Series Series Field-Programmable Gate Arrays Features 2 • Flip-flop/latch options to allow programmable prior­ ity of synchronous set/reset vs. clock enable


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    PDF 16-bit 32-bit 352-Pin BA352 432-Pin BC432 600-Pin BC600 OR2C/2T04A OR2C/2T06A PTI8 PT15D R2C14 R12C6 R11C9

    1C05

    Abstract: ATT ORCA fpga architecture PX110 1C09 2843B C05 jj MXM pin assignment 1C03 1C07 PBD 1.27
    Text: AT&T Data Sheet March 1995 ' Microelectronics Optimized Reconfigurable Cell Array {ORCA 1C Series Field-Programmable Gate Arrays ATT1C03, ATT1C05, ATT1C07, and ATT1C09) Features • High density: to 11,400 usable gates ■ High I/O: up to 256 usable I/O (forATT1C09)


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    PDF ATT1C03, ATT1C05, ATT1C07, ATT1C09) forATT1C09) 16-bit 84-Pin 100-Pin 132-Pin 144-Pin 1C05 ATT ORCA fpga architecture PX110 1C09 2843B C05 jj MXM pin assignment 1C03 1C07 PBD 1.27

    Untitled

    Abstract: No abstract text available
    Text: m i c r o e le c t r o n ic s group Preliminary Data Sheet July 1999 Lucent Technologies Bell Labs Innovations TMUX03155 STS-3/STM-1 AU-4 Multiplexer/Demultiplexer Features Applications • Multiplexes three STS-1 signals into a SONET STS-3 signal. ■ SONET/SDH line termination equipment.


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    PDF TMUX03155

    Untitled

    Abstract: No abstract text available
    Text: microelectronics Data Sheet February 1999 group Lucent Technologies Bell Labs innovations LG1626DXC Modulator Driver Features Functional Description • High data-rate optical modulator driver The LG1626DXC is a gallium-arsenide GaAs inter­ grated circuit used to provide voltages to drive optical


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    PDF LG1626DXC ECL100K LG1626DXC 24-Pin D05D02b 0G3B274

    T7290A

    Abstract: T7689
    Text: Data Sheet May 1998 m icroelectronics group Lucent Technologies Bell Labs Innovations T7689 5.0 VT1 Quad Line Interface Features Description • Four fully integrated T 1 line interfaces ■ Includes all driver, receiver, equalization, clock recovery, and jitter attenuation functions


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    PDF T7689 T-7689 100-Pin DS98-232TIC DS96-185TIC 005002b T7290A